0f39a55942
Adding the baclient code to Drydock requires a refactor of the build automation to support multiple languages and multiple artifacts included in a single Docker image NOTE: the go source here is a placeholder 'hello world' sample Change-Id: I1b4883f018b33b3d4fcd7cbcb6cba660fcdc93de
163 lines
6.9 KiB
Python
163 lines
6.9 KiB
Python
# Copyright 2017 AT&T Intellectual Property. All other rights reserved.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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from unittest.mock import Mock
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import drydock_provisioner.objects as objects
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class TestClass(object):
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def test_apply_logicalnames_else(self, input_files, deckhand_orchestrator,
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drydock_state, mock_get_build_data):
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"""Test node apply_logicalnames hits the else block"""
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input_file = input_files.join("deckhand_fullsite.yaml")
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design_ref = "file://%s" % str(input_file)
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design_status, design_data = deckhand_orchestrator.get_effective_site(
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design_ref)
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def side_effect(**kwargs):
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return []
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drydock_state.get_build_data = Mock(side_effect=side_effect)
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nodes = design_data.baremetal_nodes
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for n in nodes or []:
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n.apply_logicalnames(design_data, state_manager=drydock_state)
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assert n.logicalnames == {}
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def test_apply_logicalnames_success(self, input_files,
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deckhand_orchestrator, drydock_state,
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mock_get_build_data):
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"""Test node apply_logicalnames to get the proper dictionary"""
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input_file = input_files.join("deckhand_fullsite.yaml")
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design_ref = "file://%s" % str(input_file)
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xml_example = """
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<?xml version="1.0" standalone="yes" ?>
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<!-- generated by lshw-B.02.17 -->
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<!-- GCC 5.4.0 20160609 -->
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<!-- Linux 4.4.0-104-generic #127-Ubuntu SMP Mon Dec 11 12:16:42 UTC 2017 x86_64 -->
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<!-- GNU libc 2 (glibc 2.23) -->
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<list>
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<node id="cab23-r720-16" claimed="true" class="system" handle="DMI:0100">
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<description>Rack Mount Chassis</description>
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<product>PowerEdge R720xd (SKU=NotProvided;ModelName=PowerEdge R720xd)</product>
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<vendor>Dell Inc.</vendor>
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<serial>6H5LBY1</serial>
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<width units="bits">64</width>
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<configuration>
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<setting id="boot" value="normal" />
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<setting id="chassis" value="rackmount" />
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<setting id="sku" value="SKU=NotProvided;ModelName=PowerEdge R720xd" />
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<setting id="uuid" value="44454C4C-4800-1035-804C-B6C04F425931" />
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</configuration>
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<capabilities>
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<capability id="smbios-2.7">SMBIOS version 2.7</capability>
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<capability id="dmi-2.7">DMI version 2.7</capability>
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<capability id="vsyscall32">32-bit processes</capability>
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</capabilities>
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<node id="core" claimed="true" class="bus" handle="DMI:0200">
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<node id="pci:1" claimed="true" class="bridge" handle="PCIBUS:0000:03">
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<description>PCI bridge</description>
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<product>Xeon E5/Core i7 IIO PCI Express Root Port 2a</product>
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<vendor>Intel Corporation</vendor>
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<physid>2</physid>
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<businfo>pci@0000:00:02.0</businfo>
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<version>07</version>
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<width units="bits">32</width>
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<clock units="Hz">33000000</clock>
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<configuration>
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<setting id="driver" value="pcieport" />
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</configuration>
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<capabilities>
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<capability id="pci" />
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<capability id="msi">Message Signalled Interrupts</capability>
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<capability id="pciexpress">PCI Express</capability>
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<capability id="pm">Power Management</capability>
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<capability id="normal_decode" />
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<capability id="bus_master">bus mastering</capability>
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<capability id="cap_list">PCI capabilities listing</capability>
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</capabilities>
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<resources>
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<resource type="irq" value="26" />
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</resources>
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<node id="network:0" claimed="true" class="network" handle="PCI:0000:00:03.0">
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<description>Ethernet interface</description>
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<product>I350 Gigabit Network Connection</product>
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<vendor>Intel Corporation</vendor>
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<physid>0</physid>
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<businfo>pci@0000:00:03.0</businfo>
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<logicalname>eno1</logicalname>
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<version>01</version>
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<serial>b8:ca:3a:65:7d:d8</serial>
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<size units="bit/s">1000000000</size>
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<capacity>1000000000</capacity>
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<width units="bits">32</width>
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<clock units="Hz">33000000</clock>
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</node>
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</node>
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</node>
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<node id="disk:0" claimed="true" class="disk" handle="SCSI:00:02:00:00">
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<description>SCSI Disk</description>
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<product>PERC H710P</product>
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<vendor>DELL</vendor>
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<physid>2.0.0</physid>
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<businfo>scsi@2:0.0.0</businfo>
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<logicalname>/dev/sda</logicalname>
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<dev>8:0</dev>
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<version>3.13</version>
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<serial>0044016c12771be71900034cfba0a38c</serial>
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<size units="bytes">299439751168</size>
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</node>
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</node>
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</list>
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"""
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xml_example = xml_example.replace('\n', '')
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def side_effect(**kwargs):
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build_data = objects.BuildData(
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node_name="controller01",
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task_id="tid",
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generator="lshw",
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data_format="text/plain",
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data_element=xml_example)
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return [build_data]
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drydock_state.get_build_data = Mock(side_effect=side_effect)
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design_status, design_data = deckhand_orchestrator.get_effective_site(
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design_ref, resolve_aliases=True)
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nodes = design_data.baremetal_nodes
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expected = {
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'primary_boot': 'sda',
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'prim_nic02': 'prim_nic02',
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'prim_nic01': 'eno1'
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}
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# Tests the whole dictionary
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assert nodes[0].logicalnames == expected
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# Makes sure the path and / are both removed from primary_boot
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assert nodes[0].logicalnames['primary_boot'] == 'sda'
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assert nodes[0].get_logicalname('primary_boot') == 'sda'
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# A simple logicalname
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assert nodes[0].logicalnames['prim_nic01'] == 'eno1'
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assert nodes[0].get_logicalname('prim_nic01') == 'eno1'
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# Logicalname is not found, returns the alias
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assert nodes[0].logicalnames['prim_nic02'] == 'prim_nic02'
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assert nodes[0].get_logicalname('prim_nic02') == 'prim_nic02'
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