79c4324644
Change-Id: I2d302dda68298877c65c99147f5bf22186a59aac
2883 lines
90 KiB
Diff
2883 lines
90 KiB
Diff
From e66da47c4fc44bf2e861fbe58a84e08b11fd3f3b Mon Sep 17 00:00:00 2001
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From: lixianglai <lixianglai@loongson.cn>
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Date: Tue, 7 Feb 2023 07:17:12 -0500
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Subject: [PATCH] Add disas gdb.
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Add disas gdb xml.
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Signed-off-by: lixianglai <lixianglai@loongson.cn>
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---
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disas/loongarch.c | 2736 ++++++++++++++++++++++++++++++++++
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disas/meson.build | 1 +
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gdb-xml/loongarch-base64.xml | 45 +
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gdb-xml/loongarch-fpu.xml | 50 +
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4 files changed, 2832 insertions(+)
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create mode 100644 disas/loongarch.c
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create mode 100644 gdb-xml/loongarch-base64.xml
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create mode 100644 gdb-xml/loongarch-fpu.xml
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diff --git a/disas/loongarch.c b/disas/loongarch.c
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new file mode 100644
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index 0000000000..b3f38e99ab
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--- /dev/null
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+++ b/disas/loongarch.c
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@@ -0,0 +1,2736 @@
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+/*
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+ * QEMU Loongarch Disassembler
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+ *
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+ * Copyright (c) 2023 Loongarch Technology
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms and conditions of the GNU General Public License,
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+ * version 2 or later, as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ *
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+ * You should have received a copy of the GNU General Public License along with
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+ * this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "qemu/osdep.h"
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+#include "disas/dis-asm.h"
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+
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+#define INSNLEN 4
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+
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+/* types */
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+typedef uint16_t la_opcode;
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+
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+/* enums */
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+typedef enum {
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+ la_op_illegal = 0,
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+ la_op_gr2scr = 1,
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+ la_op_scr2gr = 2,
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+ la_op_clo_w = 3,
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+ la_op_clz_w = 4,
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+ la_op_cto_w = 5,
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+ la_op_ctz_w = 6,
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+ la_op_clo_d = 7,
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+ la_op_clz_d = 8,
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+ la_op_cto_d = 9,
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+ la_op_ctz_d = 10,
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+ la_op_revb_2h = 11,
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+ la_op_revb_4h = 12,
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+ la_op_revb_2w = 13,
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+ la_op_revb_d = 14,
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+ la_op_revh_2w = 15,
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+ la_op_revh_d = 16,
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+ la_op_bitrev_4b = 17,
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+ la_op_bitrev_8b = 18,
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+ la_op_bitrev_w = 19,
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+ la_op_bitrev_d = 20,
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+ la_op_ext_w_h = 21,
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+ la_op_ext_w_b = 22,
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+ la_op_rdtime_d = 23,
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+ la_op_cpucfg = 24,
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+ la_op_asrtle_d = 25,
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+ la_op_asrtgt_d = 26,
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+ la_op_alsl_w = 27,
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+ la_op_alsl_wu = 28,
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+ la_op_bytepick_w = 29,
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+ la_op_bytepick_d = 30,
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+ la_op_add_w = 31,
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+ la_op_add_d = 32,
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+ la_op_sub_w = 33,
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+ la_op_sub_d = 34,
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+ la_op_slt = 35,
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+ la_op_sltu = 36,
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+ la_op_maskeqz = 37,
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+ la_op_masknez = 38,
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+ la_op_nor = 39,
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+ la_op_and = 40,
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+ la_op_or = 41,
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+ la_op_xor = 42,
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+ la_op_orn = 43,
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+ la_op_andn = 44,
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+ la_op_sll_w = 45,
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+ la_op_srl_w = 46,
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+ la_op_sra_w = 47,
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+ la_op_sll_d = 48,
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+ la_op_srl_d = 49,
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+ la_op_sra_d = 50,
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+ la_op_rotr_w = 51,
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+ la_op_rotr_d = 52,
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+ la_op_mul_w = 53,
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+ la_op_mulh_w = 54,
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+ la_op_mulh_wu = 55,
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+ la_op_mul_d = 56,
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+ la_op_mulh_d = 57,
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+ la_op_mulh_du = 58,
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+ la_op_mulw_d_w = 59,
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+ la_op_mulw_d_wu = 60,
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+ la_op_div_w = 61,
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+ la_op_mod_w = 62,
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+ la_op_div_wu = 63,
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+ la_op_mod_wu = 64,
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+ la_op_div_d = 65,
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+ la_op_mod_d = 66,
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+ la_op_div_du = 67,
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+ la_op_mod_du = 68,
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+ la_op_crc_w_b_w = 69,
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+ la_op_crc_w_h_w = 70,
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+ la_op_crc_w_w_w = 71,
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+ la_op_crc_w_d_w = 72,
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+ la_op_crcc_w_b_w = 73,
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+ la_op_crcc_w_h_w = 74,
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+ la_op_crcc_w_w_w = 75,
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+ la_op_crcc_w_d_w = 76,
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+ la_op_break = 77,
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+ la_op_dbcl = 78,
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+ la_op_syscall = 79,
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+ la_op_alsl_d = 80,
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+ la_op_slli_w = 81,
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+ la_op_slli_d = 82,
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+ la_op_srli_w = 83,
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+ la_op_srli_d = 84,
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+ la_op_srai_w = 85,
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+ la_op_srai_d = 86,
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+ la_op_rotri_w = 87,
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+ la_op_rotri_d = 88,
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+ la_op_bstrins_w = 89,
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+ la_op_bstrpick_w = 90,
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+ la_op_bstrins_d = 91,
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+ la_op_bstrpick_d = 92,
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+ la_op_fadd_s = 93,
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+ la_op_fadd_d = 94,
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+ la_op_fsub_s = 95,
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+ la_op_fsub_d = 96,
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+ la_op_fmul_s = 97,
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+ la_op_fmul_d = 98,
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+ la_op_fdiv_s = 99,
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+ la_op_fdiv_d = 100,
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+ la_op_fmax_s = 101,
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+ la_op_fmax_d = 102,
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+ la_op_fmin_s = 103,
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+ la_op_fmin_d = 104,
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+ la_op_fmaxa_s = 105,
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+ la_op_fmaxa_d = 106,
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+ la_op_fmina_s = 107,
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+ la_op_fmina_d = 108,
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+ la_op_fscaleb_s = 109,
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+ la_op_fscaleb_d = 110,
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+ la_op_fcopysign_s = 111,
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+ la_op_fcopysign_d = 112,
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+ la_op_fabs_s = 113,
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+ la_op_fabs_d = 114,
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+ la_op_fneg_s = 115,
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+ la_op_fneg_d = 116,
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+ la_op_flogb_s = 117,
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+ la_op_flogb_d = 118,
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+ la_op_fclass_s = 119,
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+ la_op_fclass_d = 120,
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+ la_op_fsqrt_s = 121,
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+ la_op_fsqrt_d = 122,
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+ la_op_frecip_s = 123,
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+ la_op_frecip_d = 124,
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+ la_op_frsqrt_s = 125,
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+ la_op_frsqrt_d = 126,
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+ la_op_fmov_s = 127,
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+ la_op_fmov_d = 128,
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+ la_op_movgr2fr_w = 129,
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+ la_op_movgr2fr_d = 130,
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+ la_op_movgr2frh_w = 131,
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+ la_op_movfr2gr_s = 132,
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+ la_op_movfr2gr_d = 133,
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+ la_op_movfrh2gr_s = 134,
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+ la_op_movgr2fcsr = 135,
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+ la_op_movfcsr2gr = 136,
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+ la_op_movfr2cf = 137,
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+ la_op_movcf2fr = 138,
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+ la_op_movgr2cf = 139,
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+ la_op_movcf2gr = 140,
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+ la_op_fcvt_s_d = 141,
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+ la_op_fcvt_d_s = 142,
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+
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+ la_op_ftintrm_w_s = 143,
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+ la_op_ftintrm_w_d = 144,
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+ la_op_ftintrm_l_s = 145,
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+ la_op_ftintrm_l_d = 146,
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+ la_op_ftintrp_w_s = 147,
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+ la_op_ftintrp_w_d = 148,
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+ la_op_ftintrp_l_s = 149,
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+ la_op_ftintrp_l_d = 150,
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+ la_op_ftintrz_w_s = 151,
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+ la_op_ftintrz_w_d = 152,
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+ la_op_ftintrz_l_s = 153,
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+ la_op_ftintrz_l_d = 154,
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+ la_op_ftintrne_w_s = 155,
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+ la_op_ftintrne_w_d = 156,
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+ la_op_ftintrne_l_s = 157,
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+ la_op_ftintrne_l_d = 158,
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+ la_op_ftint_w_s = 159,
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+ la_op_ftint_w_d = 160,
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+ la_op_ftint_l_s = 161,
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+ la_op_ftint_l_d = 162,
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+ la_op_ffint_s_w = 163,
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+ la_op_ffint_s_l = 164,
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+ la_op_ffint_d_w = 165,
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+ la_op_ffint_d_l = 166,
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+ la_op_frint_s = 167,
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+ la_op_frint_d = 168,
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+
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+ la_op_slti = 169,
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+ la_op_sltui = 170,
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+ la_op_addi_w = 171,
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+ la_op_addi_d = 172,
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+ la_op_lu52i_d = 173,
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+ la_op_addi = 174,
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+ la_op_ori = 175,
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+ la_op_xori = 176,
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+
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+ la_op_csrxchg = 177,
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+ la_op_cacop = 178,
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+ la_op_lddir = 179,
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+ la_op_ldpte = 180,
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+ la_op_iocsrrd_b = 181,
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+ la_op_iocsrrd_h = 182,
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+ la_op_iocsrrd_w = 183,
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+ la_op_iocsrrd_d = 184,
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+ la_op_iocsrwr_b = 185,
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+ la_op_iocsrwr_h = 186,
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+ la_op_iocsrwr_w = 187,
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+ la_op_iocsrwr_d = 188,
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+ la_op_tlbclr = 189,
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+ la_op_tlbflush = 190,
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+ la_op_tlbsrch = 191,
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+ la_op_tlbrd = 192,
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+ la_op_tlbwr = 193,
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+ la_op_tlbfill = 194,
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+ la_op_ertn = 195,
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+ la_op_idle = 196,
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+ la_op_invtlb = 197,
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+
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+ la_op_fmadd_s = 198,
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+ la_op_fmadd_d = 199,
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+ la_op_fmsub_s = 200,
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+ la_op_fmsub_d = 201,
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+ la_op_fnmadd_s = 202,
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+ la_op_fnmadd_d = 203,
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+ la_op_fnmsub_s = 204,
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+ la_op_fnmsub_d = 205,
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+ la_op_fcmp_cond_s = 206,
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+ la_op_fcmp_cond_d = 207,
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+ la_op_fsel = 208,
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+ la_op_addu16i_d = 209,
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+ la_op_lu12i_w = 210,
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+ la_op_lu32i_d = 211,
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+ la_op_pcaddi = 212,
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+ la_op_pcalau12i = 213,
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+ la_op_pcaddu12i = 214,
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+ la_op_pcaddu18i = 215,
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+
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+ la_op_ll_w = 216,
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+ la_op_sc_w = 217,
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+ la_op_ll_d = 218,
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+ la_op_sc_d = 219,
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+ la_op_ldptr_w = 220,
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+ la_op_stptr_w = 221,
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+ la_op_ldptr_d = 222,
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+ la_op_stptr_d = 223,
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+ la_op_ld_b = 224,
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+ la_op_ld_h = 225,
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+ la_op_ld_w = 226,
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+ la_op_ld_d = 227,
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+ la_op_st_b = 228,
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+ la_op_st_h = 229,
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+ la_op_st_w = 230,
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+ la_op_st_d = 231,
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+ la_op_ld_bu = 232,
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+ la_op_ld_hu = 233,
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+ la_op_ld_wu = 234,
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+ la_op_preld = 235,
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+ la_op_fld_s = 236,
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+ la_op_fst_s = 237,
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+ la_op_fld_d = 238,
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+ la_op_fst_d = 239,
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+ la_op_ldl_w = 240,
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+ la_op_ldr_w = 241,
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+ la_op_ldl_d = 242,
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+ la_op_ldr_d = 243,
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+ la_op_stl_d = 244,
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+ la_op_str_d = 245,
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+ la_op_ldx_b = 246,
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+ la_op_ldx_h = 247,
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+ la_op_ldx_w = 248,
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+ la_op_ldx_d = 249,
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+ la_op_stx_b = 250,
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+ la_op_stx_h = 251,
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+ la_op_stx_w = 252,
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+ la_op_stx_d = 253,
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+ la_op_ldx_bu = 254,
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+ la_op_ldx_hu = 255,
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+ la_op_ldx_wu = 256,
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+ la_op_fldx_s = 257,
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+ la_op_fldx_d = 258,
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+ la_op_fstx_s = 259,
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+ la_op_fstx_d = 260,
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+
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+ la_op_amswap_w = 261,
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+ la_op_amswap_d = 262,
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+ la_op_amadd_w = 263,
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+ la_op_amadd_d = 264,
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+ la_op_amand_w = 265,
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+ la_op_amand_d = 266,
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+ la_op_amor_w = 267,
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+ la_op_amor_d = 268,
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+ la_op_amxor_w = 269,
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+ la_op_amxor_d = 270,
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+ la_op_ammax_w = 271,
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+ la_op_ammax_d = 272,
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+ la_op_ammin_w = 273,
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+ la_op_ammin_d = 274,
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+ la_op_ammax_wu = 275,
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+ la_op_ammax_du = 276,
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+ la_op_ammin_wu = 277,
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+ la_op_ammin_du = 278,
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+ la_op_amswap_db_w = 279,
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+ la_op_amswap_db_d = 280,
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+ la_op_amadd_db_w = 281,
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+ la_op_amadd_db_d = 282,
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+ la_op_amand_db_w = 283,
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+ la_op_amand_db_d = 284,
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+ la_op_amor_db_w = 285,
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+ la_op_amor_db_d = 286,
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+ la_op_amxor_db_w = 287,
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+ la_op_amxor_db_d = 288,
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+ la_op_ammax_db_w = 289,
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+ la_op_ammax_db_d = 290,
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+ la_op_ammin_db_w = 291,
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+ la_op_ammin_db_d = 292,
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+ la_op_ammax_db_wu = 293,
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+ la_op_ammax_db_du = 294,
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+ la_op_ammin_db_wu = 295,
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+ la_op_ammin_db_du = 296,
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+ la_op_dbar = 297,
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+ la_op_ibar = 298,
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+ la_op_fldgt_s = 299,
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+ la_op_fldgt_d = 300,
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+ la_op_fldle_s = 301,
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+ la_op_fldle_d = 302,
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+ la_op_fstgt_s = 303,
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+ la_op_fstgt_d = 304,
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+ ls_op_fstle_s = 305,
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+ la_op_fstle_d = 306,
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+ la_op_ldgt_b = 307,
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+ la_op_ldgt_h = 308,
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+ la_op_ldgt_w = 309,
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+ la_op_ldgt_d = 310,
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+ la_op_ldle_b = 311,
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+ la_op_ldle_h = 312,
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+ la_op_ldle_w = 313,
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+ la_op_ldle_d = 314,
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+ la_op_stgt_b = 315,
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+ la_op_stgt_h = 316,
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+ la_op_stgt_w = 317,
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+ la_op_stgt_d = 318,
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+ la_op_stle_b = 319,
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+ la_op_stle_h = 320,
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+ la_op_stle_w = 321,
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+ la_op_stle_d = 322,
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+ la_op_beqz = 323,
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+ la_op_bnez = 324,
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+ la_op_bceqz = 325,
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+ la_op_bcnez = 326,
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+ la_op_jirl = 327,
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+ la_op_b = 328,
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+ la_op_bl = 329,
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+ la_op_beq = 330,
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+ la_op_bne = 331,
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+ la_op_blt = 332,
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+ la_op_bge = 333,
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+ la_op_bltu = 334,
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+ la_op_bgeu = 335,
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+
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+ /* vz insn */
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+ la_op_hvcl = 336,
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+
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+} la_op;
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+
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+typedef enum {
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+ la_codec_illegal,
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+ la_codec_empty,
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+ la_codec_2r,
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+ la_codec_2r_u5,
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+ la_codec_2r_u6,
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+ la_codec_2r_2bw,
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+ la_codec_2r_2bd,
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+ la_codec_3r,
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+ la_codec_3r_rd0,
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+ la_codec_3r_sa2,
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+ la_codec_3r_sa3,
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+ la_codec_4r,
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|
+ la_codec_r_im20,
|
|
+ la_codec_2r_im16,
|
|
+ la_codec_2r_im14,
|
|
+ la_codec_2r_im12,
|
|
+ la_codec_im5_r_im12,
|
|
+ la_codec_2r_im8,
|
|
+ la_codec_r_sd,
|
|
+ la_codec_r_sj,
|
|
+ la_codec_r_cd,
|
|
+ la_codec_r_cj,
|
|
+ la_codec_r_seq,
|
|
+ la_codec_code,
|
|
+ la_codec_whint,
|
|
+ la_codec_invtlb,
|
|
+ la_codec_r_ofs21,
|
|
+ la_codec_cj_ofs21,
|
|
+ la_codec_ofs26,
|
|
+ la_codec_cond,
|
|
+ la_codec_sel,
|
|
+
|
|
+} la_codec;
|
|
+
|
|
+#define la_fmt_illegal "nte"
|
|
+#define la_fmt_empty "nt"
|
|
+#define la_fmt_sd_rj "ntA,1"
|
|
+#define la_fmt_rd_sj "nt0,B"
|
|
+#define la_fmt_rd_rj "nt0,1"
|
|
+#define la_fmt_rj_rk "nt1,2"
|
|
+#define la_fmt_rj_seq "nt1,x"
|
|
+#define la_fmt_rd_si20 "nt0,i(x)"
|
|
+#define la_fmt_rd_rj_ui5 "nt0,1,C"
|
|
+#define la_fmt_rd_rj_ui6 "nt0,1.C"
|
|
+#define la_fmt_rd_rj_level "nt0,1,x"
|
|
+#define la_fmt_rd_rj_msbw_lsbw "nt0,1,C,D"
|
|
+#define la_fmt_rd_rj_msbd_lsbd "nt0,1,C,D"
|
|
+#define la_fmt_rd_rj_si12 "nt0,1,i(x)"
|
|
+#define la_fmt_hint_rj_si12 "ntE,1,i(x)"
|
|
+#define la_fmt_rd_rj_csr "nt0,1,x"
|
|
+#define la_fmt_rd_rj_si14 "nt0,1,i(x)"
|
|
+#define la_fmt_rd_rj_si16 "nt0,1,i(x)"
|
|
+#define la_fmt_rd_rj_rk "nt0,1,2"
|
|
+#define la_fmt_fd_rj_rk "nt3,1,2"
|
|
+#define la_fmt_rd_rj_rk_sa2 "nt0,1,2,D"
|
|
+#define la_fmt_rd_rj_rk_sa3 "nt0,1,2,D"
|
|
+#define la_fmt_fd_rj "nt3,1"
|
|
+#define la_fmt_rd_fj "nt0,4"
|
|
+#define la_fmt_fd_fj "nt3,4"
|
|
+#define la_fmt_fd_fj_si12 "nt3,4,i(x)"
|
|
+#define la_fmt_fcsrd_rj "ntF,1"
|
|
+#define la_fmt_rd_fcsrs "nt0,G"
|
|
+#define la_fmt_cd_fj "ntH,4"
|
|
+#define la_fmt_fd_cj "nt3,I"
|
|
+#define la_fmt_fd_fj_fk "nt3,4,5"
|
|
+#define la_fmt_code "ntJ"
|
|
+#define la_fmt_whint "ntx"
|
|
+#define la_fmt_invtlb "ntx,1,2" /* op,rj,rk */
|
|
+#define la_fmt_offs26 "nto(X)p"
|
|
+#define la_fmt_rj_offs21 "nt1,o(X)p"
|
|
+#define la_fmt_cj_offs21 "ntQ,o(X)p"
|
|
+#define la_fmt_rd_rj_offs16 "nt0,1,o(X)"
|
|
+#define la_fmt_rj_rd_offs16 "nt1,0,o(X)p"
|
|
+#define la_fmt_s_cd_fj_fk "K.stH,4,5"
|
|
+#define la_fmt_d_cd_fj_fk "K.dtH,4,5"
|
|
+#define la_fmt_fd_fj_fk_fa "nt3,4,5,6"
|
|
+#define la_fmt_fd_fj_fk_ca "nt3,4,5,L"
|
|
+#define la_fmt_cop_rj_si12 "ntM,1,i(x)"
|
|
+
|
|
+/* structures */
|
|
+
|
|
+typedef struct {
|
|
+ uint32_t pc;
|
|
+ uint32_t insn;
|
|
+ int32_t imm;
|
|
+ int32_t imm2;
|
|
+ uint16_t op;
|
|
+ uint16_t code;
|
|
+ uint8_t codec;
|
|
+ uint8_t r1;
|
|
+ uint8_t r2;
|
|
+ uint8_t r3;
|
|
+ uint8_t r4;
|
|
+ uint8_t bit;
|
|
+} la_decode;
|
|
+
|
|
+typedef struct {
|
|
+ const char *const name;
|
|
+ const la_codec codec;
|
|
+ const char *const format;
|
|
+} la_opcode_data;
|
|
+
|
|
+/* reg names */
|
|
+const char *const loongarch_r_normal_name[32] = {
|
|
+ "$r0", "$r1", "$r2", "$r3", "$r4", "$r5", "$r6", "$r7",
|
|
+ "$r8", "$r9", "$r10", "$r11", "$r12", "$r13", "$r14", "$r15",
|
|
+ "$r16", "$r17", "$r18", "$r19", "$r20", "$r21", "$r22", "$r23",
|
|
+ "$r24", "$r25", "$r26", "$r27", "$r28", "$r29", "$r30", "$r31",
|
|
+};
|
|
+
|
|
+const char *const loongarch_f_normal_name[32] = {
|
|
+ "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
|
|
+ "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
|
|
+ "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
|
|
+ "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
|
|
+};
|
|
+
|
|
+const char *const loongarch_cr_normal_name[4] = {
|
|
+ "$scr0",
|
|
+ "$scr1",
|
|
+ "$scr2",
|
|
+ "$scr3",
|
|
+};
|
|
+
|
|
+const char *const loongarch_c_normal_name[8] = {
|
|
+ "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6", "$fcc7",
|
|
+};
|
|
+
|
|
+/* instruction data */
|
|
+const la_opcode_data opcode_la[] = {
|
|
+ { "illegal", la_codec_illegal, la_fmt_illegal },
|
|
+ { "gr2scr", la_codec_r_sd, la_fmt_sd_rj },
|
|
+ { "scr2gr", la_codec_r_sj, la_fmt_rd_sj },
|
|
+ { "clo.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "clz.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "cto.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "ctz.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "clo.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "clz.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "cto.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "ctz_d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revb.2h", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revb.4h", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revb.2w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revb.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revh.2w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "revh.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "bitrev.4b", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "bitrev.8b", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "bitrev.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "bitrev.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "ext.w.h", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "ext.w.b", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "rdtime.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "cpucfg", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "asrtle.d", la_codec_3r_rd0, la_fmt_rj_rk },
|
|
+ { "asrtgt.d", la_codec_3r_rd0, la_fmt_rj_rk },
|
|
+ { "alsl.w", la_codec_3r_sa2, la_fmt_rd_rj_rk_sa2 },
|
|
+ { "alsl.wu", la_codec_3r_sa2, la_fmt_rd_rj_rk_sa2 },
|
|
+ { "bytepick.w", la_codec_3r_sa2, la_fmt_rd_rj_rk_sa2 },
|
|
+ { "bytepick.d", la_codec_3r_sa3, la_fmt_rd_rj_rk_sa3 },
|
|
+ { "add.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "add.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sub.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sub.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "slt", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sltu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "maskeqz", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "masknez", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "nor", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "and", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "or", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "xor", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "orn", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "andn", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sll.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "srl.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sra.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sll.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "srl.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "sra.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "rotr.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "rotr.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mul.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulh.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulh.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mul.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulh.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulh.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulw.d.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mulw.d.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "div.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mod.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "div.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mod.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "div.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mod.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "div.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "mod.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crc.w.b.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crc.w.h.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crc.w.w.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crc.w.d.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crcc.w.b.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crcc.w.h.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crcc.w.w.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "crcc.w.d.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "break", la_codec_code, la_fmt_code },
|
|
+ { "dbcl", la_codec_code, la_fmt_code },
|
|
+ { "syscall", la_codec_code, la_fmt_code },
|
|
+ { "alsl.d", la_codec_3r_sa2, la_fmt_rd_rj_rk_sa2 },
|
|
+ { "slli.w", la_codec_2r_u5, la_fmt_rd_rj_ui5 },
|
|
+ { "slli.d", la_codec_2r_u6, la_fmt_rd_rj_ui6 },
|
|
+ { "srli.w", la_codec_2r_u5, la_fmt_rd_rj_ui5 },
|
|
+ { "srli.d", la_codec_2r_u6, la_fmt_rd_rj_ui6 },
|
|
+ { "srai.w", la_codec_2r_u5, la_fmt_rd_rj_ui5 },
|
|
+ { "srai.d", la_codec_2r_u6, la_fmt_rd_rj_ui6 },
|
|
+ { "rotri.w", la_codec_2r_u5, la_fmt_rd_rj_ui5 },
|
|
+ { "rotri.d", la_codec_2r_u6, la_fmt_rd_rj_ui6 },
|
|
+ { "bstrins.w", la_codec_2r_2bw, la_fmt_rd_rj_msbw_lsbw },
|
|
+ { "bstrpick.w", la_codec_2r_2bw, la_fmt_rd_rj_msbw_lsbw },
|
|
+ { "bstrins.d", la_codec_2r_2bd, la_fmt_rd_rj_msbd_lsbd },
|
|
+ { "bstrpick.d", la_codec_2r_2bd, la_fmt_rd_rj_msbd_lsbd },
|
|
+ { "fadd.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fadd.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fsub.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fsub.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmul.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmul.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fdiv.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fdiv.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmax.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmax.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmin.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmin.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmaxa.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmaxa.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmina.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fmina.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fscaleb.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fscaleb.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fcopysign.s", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fcopysign.d", la_codec_3r, la_fmt_fd_fj_fk },
|
|
+ { "fabs.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fabs.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fneg.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fneg.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "flogb.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "flogb.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fclass.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fclass.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fsqrt.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fsqrt.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frecip.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frecip.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frsqrt.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frsqrt.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fmov.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fmov.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "movgr2fr.w", la_codec_2r, la_fmt_fd_rj },
|
|
+ { "movgr2fr.d", la_codec_2r, la_fmt_fd_rj },
|
|
+ { "movgr2frh.w", la_codec_2r, la_fmt_fd_rj },
|
|
+ { "movfr2gr.s", la_codec_2r, la_fmt_rd_fj },
|
|
+ { "movfr2gr.d", la_codec_2r, la_fmt_rd_fj },
|
|
+ { "movfrh2gr.s", la_codec_2r, la_fmt_rd_fj },
|
|
+ { "movgr2fcsr", la_codec_2r, la_fmt_fcsrd_rj },
|
|
+ { "movfcsr2gr", la_codec_2r, la_fmt_rd_fcsrs },
|
|
+ { "movfr2cf", la_codec_r_cd, la_fmt_cd_fj },
|
|
+ { "movcf2fr", la_codec_r_cj, la_fmt_fd_cj },
|
|
+ { "movgr2cf", la_codec_r_cd, la_fmt_cd_fj },
|
|
+ { "movcf2gr", la_codec_r_cj, la_fmt_fd_cj },
|
|
+ { "fcvt.s.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "fcvt.d.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrm.w.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrm.w.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrm.l.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrm.l.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrp.w.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrp.w.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrp.l.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrp.l.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrz.w.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrz.w.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrz.l.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrz.l.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrne.w.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrne.w.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrne.l.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftintrne.l.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftint.w.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftint.w.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftint.l.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ftint.l.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ffint.s.w", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ffint.s.l", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ffint.d.w", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "ffint.d.l", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frint.s", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "frint.d", la_codec_2r, la_fmt_fd_fj },
|
|
+ { "slti", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "sltui", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "addi.w", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "addi.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "lu52i.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "addi", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ori", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "xori", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "csrxchg", la_codec_2r_im14, la_fmt_rd_rj_csr },
|
|
+ { "cacop", la_codec_im5_r_im12, la_fmt_cop_rj_si12 },
|
|
+ { "lddir", la_codec_2r_im8, la_fmt_rd_rj_level },
|
|
+ { "ldpte", la_codec_r_seq, la_fmt_rj_seq },
|
|
+ { "iocsrrd.b", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrrd.h", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrrd.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrrd.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrwr.b", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrwr.h", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrwr.w", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "iocsrwr.d", la_codec_2r, la_fmt_rd_rj },
|
|
+ { "tlbclr", la_codec_empty, la_fmt_empty },
|
|
+ { "tlbflush", la_codec_empty, la_fmt_empty },
|
|
+ { "tlbsrch", la_codec_empty, la_fmt_empty },
|
|
+ { "tlbrd", la_codec_empty, la_fmt_empty },
|
|
+ { "tlbwr", la_codec_empty, la_fmt_empty },
|
|
+ { "tlbfill", la_codec_empty, la_fmt_empty },
|
|
+ { "ertn", la_codec_empty, la_fmt_empty },
|
|
+ { "idle", la_codec_whint, la_fmt_whint },
|
|
+ { "invtlb", la_codec_invtlb, la_fmt_invtlb },
|
|
+ { "fmadd.s", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fmadd.d", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fmsub.s", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fmsub.d", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fnmadd.s", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fnmadd.d", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fnmsub.s", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fnmsub.d", la_codec_4r, la_fmt_fd_fj_fk_fa },
|
|
+ { "fcmp.cond.s", la_codec_cond, la_fmt_s_cd_fj_fk },
|
|
+ { "fcmp.cond.d", la_codec_cond, la_fmt_d_cd_fj_fk },
|
|
+ { "fsel", la_codec_sel, la_fmt_fd_fj_fk_ca },
|
|
+ { "addu16i.d", la_codec_2r_im16, la_fmt_rd_rj_si16 },
|
|
+ { "lu12i.w", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "lu32i.d", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "pcaddi", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "pcalau12i", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "pcaddu12i", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "pcaddu18i", la_codec_r_im20, la_fmt_rd_si20 },
|
|
+ { "ll.w", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "sc.w", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "ll.d", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "sc.d", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "ldptr.w", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "stptr.w", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "ldptr.d", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "stptr.d", la_codec_2r_im14, la_fmt_rd_rj_si14 },
|
|
+ { "ld.b", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.h", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.w", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "st.b", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "st.h", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "st.w", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "st.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.bu", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.hu", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ld.wu", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "preld", la_codec_2r_im12, la_fmt_hint_rj_si12 },
|
|
+ { "fld.s", la_codec_2r_im12, la_fmt_fd_fj_si12 },
|
|
+ { "fst.s", la_codec_2r_im12, la_fmt_fd_fj_si12 },
|
|
+ { "fld.d", la_codec_2r_im12, la_fmt_fd_fj_si12 },
|
|
+ { "fst.d", la_codec_2r_im12, la_fmt_fd_fj_si12 },
|
|
+ { "ldl.w", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ldr.w", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ldl.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ldr.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "stl.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "str.d", la_codec_2r_im12, la_fmt_rd_rj_si12 },
|
|
+ { "ldx.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stx.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stx.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stx.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stx.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.bu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.hu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldx.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "fldx.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fldx.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstx.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstx.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "amswap.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amswap.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amadd.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amadd.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amand.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amand.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amor.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amor.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amxor.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amxor.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amswap.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amswap.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amadd.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amadd.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amand.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amand.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amor.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amor.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amxor.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "amxor.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.db.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.db.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.db.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammax.db.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.db.wu", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ammin.db.du", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "dbar", la_codec_whint, la_fmt_whint },
|
|
+ { "ibar", la_codec_whint, la_fmt_whint },
|
|
+ { "fldgt.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fldgt.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fldle.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fldle.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstgt.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstgt.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstle.s", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "fstle.d", la_codec_3r, la_fmt_fd_rj_rk },
|
|
+ { "ldgt.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldgt.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldgt.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldgt.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldle.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldle.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldle.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "ldle.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stgt.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stgt.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stgt.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stgt.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stle.b", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stle.h", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stle.w", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "stle.d", la_codec_3r, la_fmt_rd_rj_rk },
|
|
+ { "beqz", la_codec_r_ofs21, la_fmt_rj_offs21 },
|
|
+ { "bnez", la_codec_r_ofs21, la_fmt_rj_offs21 },
|
|
+ { "bceqz", la_codec_cj_ofs21, la_fmt_cj_offs21 },
|
|
+ { "bcnez", la_codec_cj_ofs21, la_fmt_cj_offs21 },
|
|
+ { "jirl", la_codec_2r_im16, la_fmt_rd_rj_offs16 },
|
|
+ { "b", la_codec_ofs26, la_fmt_offs26 },
|
|
+ { "bl", la_codec_ofs26, la_fmt_offs26 },
|
|
+ { "beq", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+ { "bne", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+ { "blt", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+ { "bge", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+ { "bltu", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+ { "bgeu", la_codec_2r_im16, la_fmt_rj_rd_offs16 },
|
|
+
|
|
+ /* vz insn */
|
|
+ { "hvcl", la_codec_code, la_fmt_code },
|
|
+
|
|
+};
|
|
+
|
|
+/* decode opcode */
|
|
+static void decode_insn_opcode(la_decode *dec)
|
|
+{
|
|
+ uint32_t insn = dec->insn;
|
|
+ uint16_t op = la_op_illegal;
|
|
+ switch ((insn >> 26) & 0x3f) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 22) & 0xf) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 18) & 0xf) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x2:
|
|
+ switch ((insn >> 2) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_gr2scr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3:
|
|
+ switch ((insn >> 7) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_scr2gr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_clo_w;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_clz_w;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_cto_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_ctz_w;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ op = la_op_clo_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_clz_d;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_cto_d;
|
|
+ break;
|
|
+ case 0xb:
|
|
+ op = la_op_ctz_d;
|
|
+ break;
|
|
+ case 0xc:
|
|
+ op = la_op_revb_2h;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_revb_4h;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_revb_2w;
|
|
+ break;
|
|
+ case 0xf:
|
|
+ op = la_op_revb_d;
|
|
+ break;
|
|
+ case 0x10:
|
|
+ op = la_op_revh_2w;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_revh_d;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_bitrev_4b;
|
|
+ break;
|
|
+ case 0x13:
|
|
+ op = la_op_bitrev_8b;
|
|
+ break;
|
|
+ case 0x14:
|
|
+ op = la_op_bitrev_w;
|
|
+ break;
|
|
+ case 0x15:
|
|
+ op = la_op_bitrev_d;
|
|
+ break;
|
|
+ case 0x16:
|
|
+ op = la_op_ext_w_h;
|
|
+ break;
|
|
+ case 0x17:
|
|
+ op = la_op_ext_w_b;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_rdtime_d;
|
|
+ break;
|
|
+ case 0x1b:
|
|
+ op = la_op_cpucfg;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch (insn & 0x0000001f) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_asrtle_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3:
|
|
+ switch (insn & 0x0000001f) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_asrtgt_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch ((insn >> 17) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_alsl_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_alsl_wu;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch ((insn >> 17) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_bytepick_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_bytepick_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_add_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_add_d;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_sub_w;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_sub_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_slt;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_sltu;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_maskeqz;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_masknez;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x5:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_nor;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_and;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_or;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_xor;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_orn;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_andn;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_sll_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_srl_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x6:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_sra_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_sll_d;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_srl_d;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_sra_d;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_rotr_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_rotr_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x7:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_mul_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_mulh_w;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_mulh_wu;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_mul_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_mulh_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_mulh_du;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_mulw_d_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_mulw_d_wu;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x8:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_div_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_mod_w;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_div_wu;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_mod_wu;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_div_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_mod_d;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_div_du;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_mod_du;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x9:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ op = la_op_crc_w_b_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_crc_w_h_w;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_crc_w_w_w;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_crc_w_d_w;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_crcc_w_b_w;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_crcc_w_h_w;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_crcc_w_w_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_crcc_w_d_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xa:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x4:
|
|
+ op = la_op_break;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_dbcl;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_syscall;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_hvcl;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xb:
|
|
+ switch ((insn >> 17) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_alsl_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch ((insn >> 21) & 0x1) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 16) & 0x1f) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 15) & 0x1) {
|
|
+ case 0x1:
|
|
+ op = la_op_slli_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_slli_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ switch ((insn >> 15) & 0x1) {
|
|
+ case 0x1:
|
|
+ op = la_op_srli_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_srli_d;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ switch ((insn >> 15) & 0x1) {
|
|
+ case 0x1:
|
|
+ op = la_op_srai_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_srai_d;
|
|
+ break;
|
|
+ case 0xc:
|
|
+ switch ((insn >> 15) & 0x1) {
|
|
+ case 0x1:
|
|
+ op = la_op_rotri_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_rotri_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch ((insn >> 15) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_bstrins_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_bstrpick_w;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_bstrins_d;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_bstrpick_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ switch ((insn >> 15) & 0x7f) {
|
|
+ case 0x1:
|
|
+ op = la_op_fadd_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_fadd_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_fsub_s;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_fsub_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_fmul_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_fmul_d;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_fdiv_s;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_fdiv_d;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_fmax_s;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_fmax_d;
|
|
+ break;
|
|
+ case 0x15:
|
|
+ op = la_op_fmin_s;
|
|
+ break;
|
|
+ case 0x16:
|
|
+ op = la_op_fmin_d;
|
|
+ break;
|
|
+ case 0x19:
|
|
+ op = la_op_fmaxa_s;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_fmaxa_d;
|
|
+ break;
|
|
+ case 0x1d:
|
|
+ op = la_op_fmina_s;
|
|
+ break;
|
|
+ case 0x1e:
|
|
+ op = la_op_fmina_d;
|
|
+ break;
|
|
+ case 0x21:
|
|
+ op = la_op_fscaleb_s;
|
|
+ break;
|
|
+ case 0x22:
|
|
+ op = la_op_fscaleb_d;
|
|
+ break;
|
|
+ case 0x25:
|
|
+ op = la_op_fcopysign_s;
|
|
+ break;
|
|
+ case 0x26:
|
|
+ op = la_op_fcopysign_d;
|
|
+ break;
|
|
+ case 0x28:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x1:
|
|
+ op = la_op_fabs_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_fabs_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_fneg_s;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_fneg_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_flogb_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_flogb_d;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_fclass_s;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_fclass_d;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_fsqrt_s;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_fsqrt_d;
|
|
+ break;
|
|
+ case 0x15:
|
|
+ op = la_op_frecip_s;
|
|
+ break;
|
|
+ case 0x16:
|
|
+ op = la_op_frecip_d;
|
|
+ break;
|
|
+ case 0x19:
|
|
+ op = la_op_frsqrt_s;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_frsqrt_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x29:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x5:
|
|
+ op = la_op_fmov_s;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_fmov_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_movgr2fr_w;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_movgr2fr_d;
|
|
+ break;
|
|
+ case 0xb:
|
|
+ op = la_op_movgr2frh_w;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_movfr2gr_s;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_movfr2gr_d;
|
|
+ break;
|
|
+ case 0xf:
|
|
+ op = la_op_movfrh2gr_s;
|
|
+ break;
|
|
+ case 0x10:
|
|
+ op = la_op_movgr2fcsr;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_movfcsr2gr;
|
|
+ break;
|
|
+ case 0x14:
|
|
+ switch ((insn >> 3) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_movfr2cf;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x15:
|
|
+ switch ((insn >> 8) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_movcf2fr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x16:
|
|
+ switch ((insn >> 3) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_movgr2cf;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x17:
|
|
+ switch ((insn >> 8) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_movcf2gr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x32:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x6:
|
|
+ op = la_op_fcvt_s_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_fcvt_d_s;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x34:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x1:
|
|
+ op = la_op_ftintrm_w_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ftintrm_w_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_ftintrm_l_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ftintrm_l_d;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_ftintrp_w_s;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_ftintrp_w_d;
|
|
+ break;
|
|
+ case 0x19:
|
|
+ op = la_op_ftintrp_l_s;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_ftintrp_l_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x35:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x1:
|
|
+ op = la_op_ftintrz_w_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ftintrz_w_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_ftintrz_l_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ftintrz_l_d;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_ftintrne_w_s;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_ftintrne_w_d;
|
|
+ break;
|
|
+ case 0x19:
|
|
+ op = la_op_ftintrne_l_s;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_ftintrne_l_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x36:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x1:
|
|
+ op = la_op_ftint_w_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ftint_w_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_ftint_l_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ftint_l_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3a:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x4:
|
|
+ op = la_op_ffint_s_w;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_ffint_s_l;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ op = la_op_ffint_d_w;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ffint_d_l;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3c:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x11:
|
|
+ op = la_op_frint_s;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ op = la_op_frint_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x8:
|
|
+ op = la_op_slti;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_sltui;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_addi_w;
|
|
+ break;
|
|
+ case 0xb:
|
|
+ op = la_op_addi_d;
|
|
+ break;
|
|
+ case 0xc:
|
|
+ op = la_op_lu52i_d;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_addi;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_ori;
|
|
+ break;
|
|
+ case 0xf:
|
|
+ op = la_op_xori;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch ((insn >> 24) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_csrxchg;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch ((insn >> 22) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_cacop;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch ((insn >> 18) & 0xf) {
|
|
+ case 0x0:
|
|
+ op = la_op_lddir;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ switch (insn & 0x0000001f) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_ldpte;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch ((insn >> 15) & 0x7) {
|
|
+ case 0x0:
|
|
+ switch ((insn >> 10) & 0x1f) {
|
|
+ case 0x0:
|
|
+ op = la_op_iocsrrd_b;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_iocsrrd_h;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_iocsrrd_w;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_iocsrrd_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_iocsrwr_b;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_iocsrwr_h;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_iocsrwr_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_iocsrwr_d;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbclr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x9:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbflush;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xa:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbsrch;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xb:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbrd;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xc:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbwr;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xd:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_tlbfill;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xe:
|
|
+ switch (insn & 0x000003ff) {
|
|
+ case 0x00000000:
|
|
+ op = la_op_ertn;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_idle;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_invtlb;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch ((insn >> 20) & 0x3f) {
|
|
+ case 0x1:
|
|
+ op = la_op_fmadd_s;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_fmadd_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_fmsub_s;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_fmsub_d;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_fnmadd_s;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_fnmadd_d;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_fnmsub_s;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_fnmsub_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x3:
|
|
+ switch ((insn >> 20) & 0x3f) {
|
|
+ case 0x1:
|
|
+ switch ((insn >> 3) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_fcmp_cond_s;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x2:
|
|
+ switch ((insn >> 3) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_fcmp_cond_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x10:
|
|
+ switch ((insn >> 18) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_fsel;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_addu16i_d;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ switch ((insn >> 25) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_lu12i_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_lu32i_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x6:
|
|
+ switch ((insn >> 25) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_pcaddi;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_pcalau12i;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x7:
|
|
+ switch ((insn >> 25) & 0x1) {
|
|
+ case 0x0:
|
|
+ op = la_op_pcaddu12i;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_pcaddu18i;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x8:
|
|
+ switch ((insn >> 24) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_ll_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_sc_w;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ll_d;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_sc_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x9:
|
|
+ switch ((insn >> 24) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_ldptr_w;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_stptr_w;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ldptr_d;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_stptr_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xa:
|
|
+ switch ((insn >> 22) & 0xf) {
|
|
+ case 0x0:
|
|
+ op = la_op_ld_b;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_ld_h;
|
|
+ break;
|
|
+ case 0x2:
|
|
+ op = la_op_ld_w;
|
|
+ break;
|
|
+ case 0x3:
|
|
+ op = la_op_ld_d;
|
|
+ break;
|
|
+ case 0x4:
|
|
+ op = la_op_st_b;
|
|
+ break;
|
|
+ case 0x5:
|
|
+ op = la_op_st_h;
|
|
+ break;
|
|
+ case 0x6:
|
|
+ op = la_op_st_w;
|
|
+ break;
|
|
+ case 0x7:
|
|
+ op = la_op_st_d;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ op = la_op_ld_bu;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_ld_hu;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ld_wu;
|
|
+ break;
|
|
+ case 0xb:
|
|
+ op = la_op_preld;
|
|
+ break;
|
|
+ case 0xc:
|
|
+ op = la_op_fld_s;
|
|
+ break;
|
|
+ case 0xd:
|
|
+ op = la_op_fst_s;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_fld_d;
|
|
+ break;
|
|
+ case 0xf:
|
|
+ op = la_op_fst_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xb:
|
|
+ switch ((insn >> 22) & 0xf) {
|
|
+ case 0x8:
|
|
+ op = la_op_ldl_w;
|
|
+ break;
|
|
+ case 0x9:
|
|
+ op = la_op_ldr_w;
|
|
+ break;
|
|
+ case 0xa:
|
|
+ op = la_op_ldl_d;
|
|
+ break;
|
|
+ case 0xb:
|
|
+ op = la_op_ldr_d;
|
|
+ break;
|
|
+ case 0xe:
|
|
+ op = la_op_stl_d;
|
|
+ break;
|
|
+ case 0xf:
|
|
+ op = la_op_str_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0xe:
|
|
+ switch ((insn >> 15) & 0x7ff) {
|
|
+ case 0x0:
|
|
+ op = la_op_ldx_b;
|
|
+ break;
|
|
+ case 0x8:
|
|
+ op = la_op_ldx_h;
|
|
+ break;
|
|
+ case 0x10:
|
|
+ op = la_op_ldx_w;
|
|
+ break;
|
|
+ case 0x18:
|
|
+ op = la_op_ldx_d;
|
|
+ break;
|
|
+ case 0x20:
|
|
+ op = la_op_stx_b;
|
|
+ break;
|
|
+ case 0x28:
|
|
+ op = la_op_stx_h;
|
|
+ break;
|
|
+ case 0x30:
|
|
+ op = la_op_stx_w;
|
|
+ break;
|
|
+ case 0x38:
|
|
+ op = la_op_stx_d;
|
|
+ break;
|
|
+ case 0x40:
|
|
+ op = la_op_ldx_bu;
|
|
+ break;
|
|
+ case 0x48:
|
|
+ op = la_op_ldx_hu;
|
|
+ break;
|
|
+ case 0x50:
|
|
+ op = la_op_ldx_wu;
|
|
+ break;
|
|
+ case 0x60:
|
|
+ op = la_op_fldx_s;
|
|
+ break;
|
|
+ case 0x68:
|
|
+ op = la_op_fldx_d;
|
|
+ break;
|
|
+ case 0x70:
|
|
+ op = la_op_fstx_s;
|
|
+ break;
|
|
+ case 0x78:
|
|
+ op = la_op_fstx_d;
|
|
+ break;
|
|
+ case 0xc0:
|
|
+ op = la_op_amswap_w;
|
|
+ break;
|
|
+ case 0xc1:
|
|
+ op = la_op_amswap_d;
|
|
+ break;
|
|
+ case 0xc2:
|
|
+ op = la_op_amadd_w;
|
|
+ break;
|
|
+ case 0xc3:
|
|
+ op = la_op_amadd_d;
|
|
+ break;
|
|
+ case 0xc4:
|
|
+ op = la_op_amand_w;
|
|
+ break;
|
|
+ case 0xc5:
|
|
+ op = la_op_amand_d;
|
|
+ break;
|
|
+ case 0xc6:
|
|
+ op = la_op_amor_w;
|
|
+ break;
|
|
+ case 0xc7:
|
|
+ op = la_op_amor_d;
|
|
+ break;
|
|
+ case 0xc8:
|
|
+ op = la_op_amxor_w;
|
|
+ break;
|
|
+ case 0xc9:
|
|
+ op = la_op_amxor_d;
|
|
+ break;
|
|
+ case 0xca:
|
|
+ op = la_op_ammax_w;
|
|
+ break;
|
|
+ case 0xcb:
|
|
+ op = la_op_ammax_d;
|
|
+ break;
|
|
+ case 0xcc:
|
|
+ op = la_op_ammin_w;
|
|
+ break;
|
|
+ case 0xcd:
|
|
+ op = la_op_ammin_d;
|
|
+ break;
|
|
+ case 0xce:
|
|
+ op = la_op_ammax_wu;
|
|
+ break;
|
|
+ case 0xcf:
|
|
+ op = la_op_ammax_du;
|
|
+ break;
|
|
+ case 0xd0:
|
|
+ op = la_op_ammin_wu;
|
|
+ break;
|
|
+ case 0xd1:
|
|
+ op = la_op_ammin_du;
|
|
+ break;
|
|
+ case 0xd2:
|
|
+ op = la_op_amswap_db_w;
|
|
+ break;
|
|
+ case 0xd3:
|
|
+ op = la_op_amswap_db_d;
|
|
+ break;
|
|
+ case 0xd4:
|
|
+ op = la_op_amadd_db_w;
|
|
+ break;
|
|
+ case 0xd5:
|
|
+ op = la_op_amadd_db_d;
|
|
+ break;
|
|
+ case 0xd6:
|
|
+ op = la_op_amand_db_w;
|
|
+ break;
|
|
+ case 0xd7:
|
|
+ op = la_op_amand_db_d;
|
|
+ break;
|
|
+ case 0xd8:
|
|
+ op = la_op_amor_db_w;
|
|
+ break;
|
|
+ case 0xd9:
|
|
+ op = la_op_amor_db_d;
|
|
+ break;
|
|
+ case 0xda:
|
|
+ op = la_op_amxor_db_w;
|
|
+ break;
|
|
+ case 0xdb:
|
|
+ op = la_op_amxor_db_d;
|
|
+ break;
|
|
+ case 0xdc:
|
|
+ op = la_op_ammax_db_w;
|
|
+ break;
|
|
+ case 0xdd:
|
|
+ op = la_op_ammax_db_d;
|
|
+ break;
|
|
+ case 0xde:
|
|
+ op = la_op_ammin_db_w;
|
|
+ break;
|
|
+ case 0xdf:
|
|
+ op = la_op_ammin_db_d;
|
|
+ break;
|
|
+ case 0xe0:
|
|
+ op = la_op_ammax_db_wu;
|
|
+ break;
|
|
+ case 0xe1:
|
|
+ op = la_op_ammax_db_du;
|
|
+ break;
|
|
+ case 0xe2:
|
|
+ op = la_op_ammin_db_wu;
|
|
+ break;
|
|
+ case 0xe3:
|
|
+ op = la_op_ammin_db_du;
|
|
+ break;
|
|
+ case 0xe4:
|
|
+ op = la_op_dbar;
|
|
+ break;
|
|
+ case 0xe5:
|
|
+ op = la_op_ibar;
|
|
+ break;
|
|
+ case 0xe8:
|
|
+ op = la_op_fldgt_s;
|
|
+ break;
|
|
+ case 0xe9:
|
|
+ op = la_op_fldgt_d;
|
|
+ break;
|
|
+ case 0xea:
|
|
+ op = la_op_fldle_s;
|
|
+ break;
|
|
+ case 0xeb:
|
|
+ op = la_op_fldle_d;
|
|
+ break;
|
|
+ case 0xec:
|
|
+ op = la_op_fstgt_s;
|
|
+ break;
|
|
+ case 0xed:
|
|
+ op = la_op_fstgt_d;
|
|
+ break;
|
|
+ case 0xee:
|
|
+ op = ls_op_fstle_s;
|
|
+ break;
|
|
+ case 0xef:
|
|
+ op = la_op_fstle_d;
|
|
+ break;
|
|
+ case 0xf0:
|
|
+ op = la_op_ldgt_b;
|
|
+ break;
|
|
+ case 0xf1:
|
|
+ op = la_op_ldgt_h;
|
|
+ break;
|
|
+ case 0xf2:
|
|
+ op = la_op_ldgt_w;
|
|
+ break;
|
|
+ case 0xf3:
|
|
+ op = la_op_ldgt_d;
|
|
+ break;
|
|
+ case 0xf4:
|
|
+ op = la_op_ldle_b;
|
|
+ break;
|
|
+ case 0xf5:
|
|
+ op = la_op_ldle_h;
|
|
+ break;
|
|
+ case 0xf6:
|
|
+ op = la_op_ldle_w;
|
|
+ break;
|
|
+ case 0xf7:
|
|
+ op = la_op_ldle_d;
|
|
+ break;
|
|
+ case 0xf8:
|
|
+ op = la_op_stgt_b;
|
|
+ break;
|
|
+ case 0xf9:
|
|
+ op = la_op_stgt_h;
|
|
+ break;
|
|
+ case 0xfa:
|
|
+ op = la_op_stgt_w;
|
|
+ break;
|
|
+ case 0xfb:
|
|
+ op = la_op_stgt_d;
|
|
+ break;
|
|
+ case 0xfc:
|
|
+ op = la_op_stle_b;
|
|
+ break;
|
|
+ case 0xfd:
|
|
+ op = la_op_stle_h;
|
|
+ break;
|
|
+ case 0xfe:
|
|
+ op = la_op_stle_w;
|
|
+ break;
|
|
+ case 0xff:
|
|
+ op = la_op_stle_d;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x10:
|
|
+ op = la_op_beqz;
|
|
+ break;
|
|
+ case 0x11:
|
|
+ op = la_op_bnez;
|
|
+ break;
|
|
+ case 0x12:
|
|
+ switch ((insn >> 8) & 0x3) {
|
|
+ case 0x0:
|
|
+ op = la_op_bceqz;
|
|
+ break;
|
|
+ case 0x1:
|
|
+ op = la_op_bcnez;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 0x13:
|
|
+ op = la_op_jirl;
|
|
+ break;
|
|
+ case 0x14:
|
|
+ op = la_op_b;
|
|
+ break;
|
|
+ case 0x15:
|
|
+ op = la_op_bl;
|
|
+ break;
|
|
+ case 0x16:
|
|
+ op = la_op_beq;
|
|
+ break;
|
|
+ case 0x17:
|
|
+ op = la_op_bne;
|
|
+ break;
|
|
+ case 0x18:
|
|
+ op = la_op_blt;
|
|
+ break;
|
|
+ case 0x19:
|
|
+ op = la_op_bge;
|
|
+ break;
|
|
+ case 0x1a:
|
|
+ op = la_op_bltu;
|
|
+ break;
|
|
+ case 0x1b:
|
|
+ op = la_op_bgeu;
|
|
+ break;
|
|
+ default:
|
|
+ op = la_op_illegal;
|
|
+ break;
|
|
+ }
|
|
+ dec->op = op;
|
|
+}
|
|
+
|
|
+/* operand extractors */
|
|
+#define IM_5 5
|
|
+#define IM_8 8
|
|
+#define IM_12 12
|
|
+#define IM_14 14
|
|
+#define IM_15 15
|
|
+#define IM_16 16
|
|
+#define IM_20 20
|
|
+#define IM_21 21
|
|
+#define IM_26 26
|
|
+
|
|
+static uint32_t operand_r1(uint32_t insn)
|
|
+{
|
|
+ return insn & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_r2(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 5) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_r3(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 10) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_r4(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 15) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_u6(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 10) & 0x3f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_bw1(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 10) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_bw2(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 16) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_bd1(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 10) & 0x3f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_bd2(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 16) & 0x3f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_sa2(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 15) & 0x3;
|
|
+}
|
|
+
|
|
+static uint32_t operand_sa3(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 15) & 0x3;
|
|
+}
|
|
+
|
|
+static int32_t operand_im20(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)((insn >> 5) & 0xfffff);
|
|
+ return imm > (1 << 19) ? imm - (1 << 20) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_im16(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)((insn >> 10) & 0xffff);
|
|
+ return imm > (1 << 15) ? imm - (1 << 16) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_im14(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)((insn >> 10) & 0x3fff);
|
|
+ return imm > (1 << 13) ? imm - (1 << 14) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_im12(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)((insn >> 10) & 0xfff);
|
|
+ return imm > (1 << 11) ? imm - (1 << 12) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_im8(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)((insn >> 10) & 0xff);
|
|
+ return imm > (1 << 7) ? imm - (1 << 8) : imm;
|
|
+}
|
|
+
|
|
+static uint32_t operand_sd(uint32_t insn)
|
|
+{
|
|
+ return insn & 0x3;
|
|
+}
|
|
+
|
|
+static uint32_t operand_sj(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 5) & 0x3;
|
|
+}
|
|
+
|
|
+static uint32_t operand_cd(uint32_t insn)
|
|
+{
|
|
+ return insn & 0x7;
|
|
+}
|
|
+
|
|
+static uint32_t operand_cj(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 5) & 0x7;
|
|
+}
|
|
+
|
|
+static uint32_t operand_code(uint32_t insn)
|
|
+{
|
|
+ return insn & 0x7fff;
|
|
+}
|
|
+
|
|
+static int32_t operand_whint(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)(insn & 0x7fff);
|
|
+ return imm > (1 << 14) ? imm - (1 << 15) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_invop(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (int32_t)(insn & 0x1f);
|
|
+ return imm > (1 << 4) ? imm - (1 << 5) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_ofs21(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (((int32_t)insn & 0x1f) << 16) | ((insn >> 10) & 0xffff);
|
|
+ return imm > (1 << 20) ? imm - (1 << 21) : imm;
|
|
+}
|
|
+
|
|
+static int32_t operand_ofs26(uint32_t insn)
|
|
+{
|
|
+ int32_t imm = (((int32_t)insn & 0x3ff) << 16) | ((insn >> 10) & 0xffff);
|
|
+ return imm > (1 << 25) ? imm - (1 << 26) : imm;
|
|
+}
|
|
+
|
|
+static uint32_t operand_fcond(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 15) & 0x1f;
|
|
+}
|
|
+
|
|
+static uint32_t operand_sel(uint32_t insn)
|
|
+{
|
|
+ return (insn >> 15) & 0x7;
|
|
+}
|
|
+
|
|
+/* decode operands */
|
|
+static void decode_insn_operands(la_decode *dec)
|
|
+{
|
|
+ uint32_t insn = dec->insn;
|
|
+ dec->codec = opcode_la[dec->op].codec;
|
|
+ switch (dec->codec) {
|
|
+ case la_codec_illegal:
|
|
+ case la_codec_empty:
|
|
+ break;
|
|
+ case la_codec_2r:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ break;
|
|
+ case la_codec_2r_u5:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ break;
|
|
+ case la_codec_2r_u6:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_u6(insn);
|
|
+ break;
|
|
+ case la_codec_2r_2bw:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_bw1(insn);
|
|
+ dec->r4 = operand_bw2(insn);
|
|
+ break;
|
|
+ case la_codec_2r_2bd:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_bd1(insn);
|
|
+ dec->r4 = operand_bd2(insn);
|
|
+ break;
|
|
+ case la_codec_3r:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ break;
|
|
+ case la_codec_3r_rd0:
|
|
+ dec->r1 = 0;
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ break;
|
|
+ case la_codec_3r_sa2:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ dec->r4 = operand_sa2(insn);
|
|
+ break;
|
|
+ case la_codec_3r_sa3:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ dec->r4 = operand_sa3(insn);
|
|
+ break;
|
|
+ case la_codec_4r:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ dec->r4 = operand_r4(insn);
|
|
+ break;
|
|
+ case la_codec_r_im20:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->imm = operand_im20(insn);
|
|
+ dec->bit = IM_20;
|
|
+ break;
|
|
+ case la_codec_2r_im16:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->imm = operand_im16(insn);
|
|
+ dec->bit = IM_16;
|
|
+ break;
|
|
+ case la_codec_2r_im14:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->imm = operand_im14(insn);
|
|
+ dec->bit = IM_14;
|
|
+ break;
|
|
+ case la_codec_im5_r_im12:
|
|
+ dec->imm2 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->imm = operand_im12(insn);
|
|
+ dec->bit = IM_12;
|
|
+ break;
|
|
+ case la_codec_2r_im12:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->imm = operand_im12(insn);
|
|
+ dec->bit = IM_12;
|
|
+ break;
|
|
+ case la_codec_2r_im8:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->imm = operand_im8(insn);
|
|
+ dec->bit = IM_8;
|
|
+ break;
|
|
+ case la_codec_r_sd:
|
|
+ dec->r1 = operand_sd(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ break;
|
|
+ case la_codec_r_sj:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_sj(insn);
|
|
+ break;
|
|
+ case la_codec_r_cd:
|
|
+ dec->r1 = operand_cd(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ break;
|
|
+ case la_codec_r_cj:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_cj(insn);
|
|
+ break;
|
|
+ case la_codec_r_seq:
|
|
+ dec->r1 = 0;
|
|
+ dec->r2 = operand_r1(insn);
|
|
+ dec->imm = operand_im8(insn);
|
|
+ dec->bit = IM_8;
|
|
+ break;
|
|
+ case la_codec_code:
|
|
+ dec->code = operand_code(insn);
|
|
+ break;
|
|
+ case la_codec_whint:
|
|
+ dec->imm = operand_whint(insn);
|
|
+ dec->bit = IM_15;
|
|
+ break;
|
|
+ case la_codec_invtlb:
|
|
+ dec->imm = operand_invop(insn);
|
|
+ dec->bit = IM_5;
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ break;
|
|
+ case la_codec_r_ofs21:
|
|
+ dec->imm = operand_ofs21(insn);
|
|
+ dec->bit = IM_21;
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ break;
|
|
+ case la_codec_cj_ofs21:
|
|
+ dec->imm = operand_ofs21(insn);
|
|
+ dec->bit = IM_21;
|
|
+ dec->r2 = operand_cj(insn);
|
|
+ break;
|
|
+ case la_codec_ofs26:
|
|
+ dec->imm = operand_ofs26(insn);
|
|
+ dec->bit = IM_26;
|
|
+ break;
|
|
+ case la_codec_cond:
|
|
+ dec->r1 = operand_cd(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ dec->r4 = operand_fcond(insn);
|
|
+ break;
|
|
+ case la_codec_sel:
|
|
+ dec->r1 = operand_r1(insn);
|
|
+ dec->r2 = operand_r2(insn);
|
|
+ dec->r3 = operand_r3(insn);
|
|
+ dec->r4 = operand_sel(insn);
|
|
+ break;
|
|
+ }
|
|
+}
|
|
+
|
|
+/* format instruction */
|
|
+
|
|
+static void append(char *s1, const char *s2, size_t n)
|
|
+{
|
|
+ size_t l1 = strlen(s1);
|
|
+ if (n - l1 - 1 > 0) {
|
|
+ strncat(s1, s2, n - l1);
|
|
+ }
|
|
+}
|
|
+
|
|
+static void format_insn(char *buf, size_t buflen, size_t tab, la_decode *dec)
|
|
+{
|
|
+ char tmp[16];
|
|
+ const char *fmt;
|
|
+
|
|
+ fmt = opcode_la[dec->op].format;
|
|
+ while (*fmt) {
|
|
+ switch (*fmt) {
|
|
+ case 'n': /* name */
|
|
+ append(buf, opcode_la[dec->op].name, buflen);
|
|
+ break;
|
|
+ case 's':
|
|
+ append(buf, "s", buflen);
|
|
+ break;
|
|
+ case 'd':
|
|
+ append(buf, "d", buflen);
|
|
+ break;
|
|
+ case 'e': /* illegal */
|
|
+ snprintf(tmp, sizeof(tmp), "%x", dec->insn);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 't':
|
|
+ while (strlen(buf) < tab) {
|
|
+ append(buf, " ", buflen);
|
|
+ }
|
|
+ break;
|
|
+ case '(':
|
|
+ append(buf, "(", buflen);
|
|
+ break;
|
|
+ case ',':
|
|
+ append(buf, ",", buflen);
|
|
+ break;
|
|
+ case '.':
|
|
+ append(buf, ".", buflen);
|
|
+ break;
|
|
+ case ')':
|
|
+ append(buf, ")", buflen);
|
|
+ break;
|
|
+ case '0': /* rd */
|
|
+ append(buf, loongarch_r_normal_name[dec->r1], buflen);
|
|
+ break;
|
|
+ case '1': /* rj */
|
|
+ append(buf, loongarch_r_normal_name[dec->r2], buflen);
|
|
+ break;
|
|
+ case '2': /* rk */
|
|
+ append(buf, loongarch_r_normal_name[dec->r3], buflen);
|
|
+ break;
|
|
+ case '3': /* fd */
|
|
+ append(buf, loongarch_f_normal_name[dec->r1], buflen);
|
|
+ break;
|
|
+ case '4': /* fj */
|
|
+ append(buf, loongarch_f_normal_name[dec->r2], buflen);
|
|
+ break;
|
|
+ case '5': /* fk */
|
|
+ append(buf, loongarch_f_normal_name[dec->r3], buflen);
|
|
+ break;
|
|
+ case '6': /* fa */
|
|
+ append(buf, loongarch_f_normal_name[dec->r4], buflen);
|
|
+ break;
|
|
+ case 'A': /* sd */
|
|
+ append(buf, loongarch_cr_normal_name[dec->r1], buflen);
|
|
+ break;
|
|
+ case 'B': /* sj */
|
|
+ append(buf, loongarch_cr_normal_name[dec->r2], buflen);
|
|
+ break;
|
|
+ case 'C': /* r3 */
|
|
+ snprintf(tmp, sizeof(tmp), "%x", dec->r3);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'D': /* r4 */
|
|
+ snprintf(tmp, sizeof(tmp), "%x", dec->r4);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'E': /* r1 */
|
|
+ snprintf(tmp, sizeof(tmp), "%x", dec->r1);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'F': /* fcsrd */
|
|
+ append(buf, loongarch_r_normal_name[dec->r1], buflen);
|
|
+ break;
|
|
+ case 'G': /* fcsrs */
|
|
+ append(buf, loongarch_r_normal_name[dec->r2], buflen);
|
|
+ break;
|
|
+ case 'H': /* cd */
|
|
+ append(buf, loongarch_c_normal_name[dec->r1], buflen);
|
|
+ break;
|
|
+ case 'I': /* cj */
|
|
+ append(buf, loongarch_c_normal_name[dec->r2], buflen);
|
|
+ break;
|
|
+ case 'J': /* code */
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", dec->code);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'K': /* cond */
|
|
+ switch (dec->r4) {
|
|
+ case 0x0:
|
|
+ append(buf, "caf", buflen);
|
|
+ break;
|
|
+ case 0x1:
|
|
+ append(buf, "saf", buflen);
|
|
+ break;
|
|
+ case 0x2:
|
|
+ append(buf, "clt", buflen);
|
|
+ break;
|
|
+ case 0x3:
|
|
+ append(buf, "slt", buflen);
|
|
+ break;
|
|
+ case 0x4:
|
|
+ append(buf, "ceq", buflen);
|
|
+ break;
|
|
+ case 0x5:
|
|
+ append(buf, "seq", buflen);
|
|
+ break;
|
|
+ case 0x6:
|
|
+ append(buf, "cle", buflen);
|
|
+ break;
|
|
+ case 0x7:
|
|
+ append(buf, "sle", buflen);
|
|
+ break;
|
|
+ case 0x8:
|
|
+ append(buf, "cun", buflen);
|
|
+ break;
|
|
+ case 0x9:
|
|
+ append(buf, "sun", buflen);
|
|
+ break;
|
|
+ case 0xA:
|
|
+ append(buf, "cult", buflen);
|
|
+ break;
|
|
+ case 0xB:
|
|
+ append(buf, "sult", buflen);
|
|
+ break;
|
|
+ case 0xC:
|
|
+ append(buf, "cueq", buflen);
|
|
+ break;
|
|
+ case 0xD:
|
|
+ append(buf, "sueq", buflen);
|
|
+ break;
|
|
+ case 0xE:
|
|
+ append(buf, "cule", buflen);
|
|
+ break;
|
|
+ case 0xF:
|
|
+ append(buf, "sule", buflen);
|
|
+ break;
|
|
+ case 0x10:
|
|
+ append(buf, "cne", buflen);
|
|
+ break;
|
|
+ case 0x11:
|
|
+ append(buf, "sne", buflen);
|
|
+ break;
|
|
+ case 0x14:
|
|
+ append(buf, "cor", buflen);
|
|
+ break;
|
|
+ case 0x15:
|
|
+ append(buf, "sor", buflen);
|
|
+ break;
|
|
+ case 0x18:
|
|
+ append(buf, "cune", buflen);
|
|
+ break;
|
|
+ case 0x19:
|
|
+ append(buf, "sune", buflen);
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 'L': /* ca */
|
|
+ append(buf, loongarch_c_normal_name[dec->r4], buflen);
|
|
+ break;
|
|
+ case 'M': /* cop */
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm2) & 0x1f);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'i': /* sixx d */
|
|
+ snprintf(tmp, sizeof(tmp), "%d", dec->imm);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'o': /* offset */
|
|
+ snprintf(tmp, sizeof(tmp), "%d", (dec->imm) << 2);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case 'x': /* sixx x */
|
|
+ switch (dec->bit) {
|
|
+ case IM_5:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0x1f);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_8:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0xff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_12:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0xfff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_14:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0x3fff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_15:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0x7fff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_16:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0xffff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_20:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) & 0xfffff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ default:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", dec->imm);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 'X': /* offset x*/
|
|
+ switch (dec->bit) {
|
|
+ case IM_16:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", ((dec->imm) << 2) & 0xffff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_21:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x",
|
|
+ ((dec->imm) << 2) & 0x1fffff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ case IM_26:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x",
|
|
+ ((dec->imm) << 2) & 0x3ffffff);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ default:
|
|
+ snprintf(tmp, sizeof(tmp), "0x%x", (dec->imm) << 2);
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+ case 'p': /* pc */
|
|
+ snprintf(tmp, sizeof(tmp), " # 0x%" PRIx32 "",
|
|
+ dec->pc + ((dec->imm) << 2));
|
|
+ append(buf, tmp, buflen);
|
|
+ break;
|
|
+ default:
|
|
+ break;
|
|
+ }
|
|
+ fmt++;
|
|
+ }
|
|
+}
|
|
+
|
|
+/* disassemble instruction */
|
|
+static void disasm_insn(char *buf, size_t buflen, bfd_vma pc,
|
|
+ unsigned long int insn)
|
|
+{
|
|
+ la_decode dec = { 0 };
|
|
+ dec.pc = pc;
|
|
+ dec.insn = insn;
|
|
+ decode_insn_opcode(&dec);
|
|
+ decode_insn_operands(&dec);
|
|
+ format_insn(buf, buflen, 16, &dec);
|
|
+}
|
|
+
|
|
+int print_insn_loongarch(bfd_vma memaddr, struct disassemble_info *info)
|
|
+{
|
|
+ char buf[128] = { 0 };
|
|
+ bfd_byte buffer[INSNLEN];
|
|
+ unsigned long insn;
|
|
+ int status;
|
|
+
|
|
+ status = (*info->read_memory_func)(memaddr, buffer, INSNLEN, info);
|
|
+ if (status == 0) {
|
|
+ insn = (uint32_t)bfd_getl32(buffer);
|
|
+ (*info->fprintf_func)(info->stream, "%08" PRIx64 " ", insn);
|
|
+ } else {
|
|
+ (*info->memory_error_func)(status, memaddr, info);
|
|
+ return -1;
|
|
+ }
|
|
+ disasm_insn(buf, sizeof(buf), memaddr, insn);
|
|
+ (*info->fprintf_func)(info->stream, "\t%s", buf);
|
|
+ return INSNLEN;
|
|
+}
|
|
diff --git a/disas/meson.build b/disas/meson.build
|
|
index 5c5daa69a7..c337369cb1 100644
|
|
--- a/disas/meson.build
|
|
+++ b/disas/meson.build
|
|
@@ -12,6 +12,7 @@ common_ss.add(when: 'CONFIG_I386_DIS', if_true: files('i386.c'))
|
|
common_ss.add(when: 'CONFIG_M68K_DIS', if_true: files('m68k.c'))
|
|
common_ss.add(when: 'CONFIG_MICROBLAZE_DIS', if_true: files('microblaze.c'))
|
|
common_ss.add(when: 'CONFIG_MIPS_DIS', if_true: files('mips.c'))
|
|
+common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: files('loongarch.c'))
|
|
common_ss.add(when: 'CONFIG_NANOMIPS_DIS', if_true: files('nanomips.cpp'))
|
|
common_ss.add(when: 'CONFIG_NIOS2_DIS', if_true: files('nios2.c'))
|
|
common_ss.add(when: 'CONFIG_PPC_DIS', if_true: files('ppc.c'))
|
|
diff --git a/gdb-xml/loongarch-base64.xml b/gdb-xml/loongarch-base64.xml
|
|
new file mode 100644
|
|
index 0000000000..2e515e0e36
|
|
--- /dev/null
|
|
+++ b/gdb-xml/loongarch-base64.xml
|
|
@@ -0,0 +1,45 @@
|
|
+<?xml version="1.0"?>
|
|
+<!-- Copyright (C) 2023 Free Software Foundation, Inc.
|
|
+
|
|
+ Copying and distribution of this file, with or without modification,
|
|
+ are permitted in any medium without royalty provided the copyright
|
|
+ notice and this notice are preserved. -->
|
|
+
|
|
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
|
+<feature name="org.gnu.gdb.loongarch.base">
|
|
+ <reg name="r0" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r1" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r2" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r3" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r4" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r5" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r6" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r7" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r8" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r9" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r10" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r11" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r12" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r13" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r14" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r15" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r16" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r17" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r18" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r19" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r20" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r21" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r22" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r23" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r24" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r25" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r26" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r27" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r28" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r29" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r30" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="r31" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="orig_a0" bitsize="64" type="uint64" group="general"/>
|
|
+ <reg name="pc" bitsize="64" type="code_ptr" group="general"/>
|
|
+ <reg name="badv" bitsize="64" type="code_ptr" group="general"/>
|
|
+</feature>
|
|
diff --git a/gdb-xml/loongarch-fpu.xml b/gdb-xml/loongarch-fpu.xml
|
|
new file mode 100644
|
|
index 0000000000..d398fe3650
|
|
--- /dev/null
|
|
+++ b/gdb-xml/loongarch-fpu.xml
|
|
@@ -0,0 +1,50 @@
|
|
+<?xml version="1.0"?>
|
|
+<!-- Copyright (C) 2023 Free Software Foundation, Inc.
|
|
+
|
|
+ Copying and distribution of this file, with or without modification,
|
|
+ are permitted in any medium without royalty provided the copyright
|
|
+ notice and this notice are preserved. -->
|
|
+
|
|
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
|
+<feature name="org.gnu.gdb.loongarch.fpu">
|
|
+
|
|
+ <union id="fputype">
|
|
+ <field name="f" type="ieee_single"/>
|
|
+ <field name="d" type="ieee_double"/>
|
|
+ </union>
|
|
+
|
|
+ <reg name="f0" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f1" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f2" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f3" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f4" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f5" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f6" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f7" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f8" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f9" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f10" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f11" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f12" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f13" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f14" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f15" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f16" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f17" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f18" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f19" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f20" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f21" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f22" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f23" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f24" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f25" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f26" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f27" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f28" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f29" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f30" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="f31" bitsize="64" type="fputype" group="float"/>
|
|
+ <reg name="fcc" bitsize="64" type="uint64" group="float"/>
|
|
+ <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
|
|
+</feature>
|
|
--
|
|
2.27.0
|
|
|