47 lines
2.0 KiB
Diff
47 lines
2.0 KiB
Diff
From 919af9a7472996b17c45fcd508ae29ec58117e8c Mon Sep 17 00:00:00 2001
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From: Wanghe Xiao <xiaowanghe_yewu@cmss.chinamobile.com>
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Date: Sat, 25 Nov 2023 02:39:26 -0800
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Subject: [PATCH] hw/riscv: boot: Reduce FDT address alignment constraints
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cherry picked from commit ec2c62dacc186893a6ce63089f96b1906dd68804
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We previously stored the device tree at a 16MB alignment from the end of
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memory (or 3GB). This means we need at least 16MB of memory to be able
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to do this. We don't actually need the FDT to be 16MB aligned, so let's
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drop it down to 2MB so that we can support systems with less memory,
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while also allowing FDT size expansion.
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/992
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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Reviewed-by: Atish Patra <atishp@rivosinc.com>
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Reviewed-by: Bin Meng <bin.meng@windriver.com>
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Tested-by: Bin Meng <bin.meng@windriver.com>
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Message-Id: <20220608062015.317894-1-alistair.francis@opensource.wdc.com>
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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Signed-off-by: Wanghe Xiao <xiaowanghe_yewu@cmss.chinamobile.com>
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---
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hw/riscv/boot.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
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index 519fa455a1..c035aa68f5 100644
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--- a/hw/riscv/boot.c
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+++ b/hw/riscv/boot.c
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@@ -217,11 +217,11 @@ uint32_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
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/*
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* We should put fdt as far as possible to avoid kernel/initrd overwriting
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* its content. But it should be addressable by 32 bit system as well.
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- * Thus, put it at an 16MB aligned address that less than fdt size from the
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+ * Thus, put it at an 2MB aligned address that less than fdt size from the
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* end of dram or 3GB whichever is lesser.
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*/
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temp = MIN(dram_end, 3072 * MiB);
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- fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 16 * MiB);
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+ fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
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ret = fdt_pack(fdt);
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/* Should only fail if we've built a corrupted tree */
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--
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2.27.0
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