128 lines
3.9 KiB
Diff
128 lines
3.9 KiB
Diff
From c71485494970e7aa986be2b05bf7e2847017e264 Mon Sep 17 00:00:00 2001
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From: Liu Yi L <yi.l.liu@intel.com>
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Date: Fri, 5 Jul 2019 19:01:36 +0800
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Subject: [PATCH] pci: introduce PCIPASIDOps to PCIDevice
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This patch introduces PCIPASIDOps for IOMMU related operations.
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https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg00078.html
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https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg00940.html
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So far, to setup virt-SVA for assigned SVA capable device, needs to
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configure host translation structures for specific pasid. (e.g. bind
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guest page table to host and enable nested translation in host).
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Besides, vIOMMU emulator needs to forward guest's cache invalidation
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to host since host nested translation is enabled. e.g. on VT-d, guest
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owns 1st level translation table, thus cache invalidation for 1st
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level should be propagated to host.
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This patch adds two functions: alloc_pasid and free_pasid to support
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guest pasid allocation and free. The implementations of the callbacks
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would be device passthru modules. Like vfio.
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Cc: Kevin Tian <kevin.tian@intel.com>
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Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
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Cc: Peter Xu <peterx@redhat.com>
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Cc: Eric Auger <eric.auger@redhat.com>
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Cc: Yi Sun <yi.y.sun@linux.intel.com>
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Cc: David Gibson <david@gibson.dropbear.id.au>
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Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
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Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
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Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
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---
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hw/pci/pci.c | 34 ++++++++++++++++++++++++++++++++++
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include/hw/pci/pci.h | 11 +++++++++++
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2 files changed, 45 insertions(+)
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diff --git a/hw/pci/pci.c b/hw/pci/pci.c
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index e5993c1ef5..4a9374c025 100644
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--- a/hw/pci/pci.c
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+++ b/hw/pci/pci.c
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@@ -2759,6 +2759,40 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
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bus->iommu_opaque = opaque;
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}
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+void pci_setup_pasid_ops(PCIDevice *dev, PCIPASIDOps *ops)
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+{
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+ assert(ops && !dev->pasid_ops);
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+ dev->pasid_ops = ops;
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+}
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+
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+bool pci_device_is_pasid_ops_set(PCIBus *bus, int32_t devfn)
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+{
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+ PCIDevice *dev;
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+
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+ if (!bus) {
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+ return false;
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+ }
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+
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+ dev = bus->devices[devfn];
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+ return !!(dev && dev->pasid_ops);
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+}
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+
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+int pci_device_set_pasid_table(PCIBus *bus, int32_t devfn,
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+ IOMMUConfig *config)
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+{
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+ PCIDevice *dev;
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+
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+ if (!bus) {
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+ return -EINVAL;
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+ }
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+
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+ dev = bus->devices[devfn];
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+ if (dev && dev->pasid_ops && dev->pasid_ops->set_pasid_table) {
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+ return dev->pasid_ops->set_pasid_table(bus, devfn, config);
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+ }
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+ return -ENOENT;
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+}
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+
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static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
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{
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Range *range = opaque;
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diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
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index e7cdf2d5ec..abffa12a99 100644
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--- a/include/hw/pci/pci.h
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+++ b/include/hw/pci/pci.h
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@@ -9,6 +9,7 @@
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#include "hw/pci/pcie.h"
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#include "qom/object.h"
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+#include "hw/iommu/iommu.h"
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extern bool pci_available;
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@@ -265,6 +266,11 @@ struct PCIReqIDCache {
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};
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typedef struct PCIReqIDCache PCIReqIDCache;
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+struct PCIPASIDOps {
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+ int (*set_pasid_table)(PCIBus *bus, int32_t devfn, IOMMUConfig *config);
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+};
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+typedef struct PCIPASIDOps PCIPASIDOps;
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+
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struct PCIDevice {
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DeviceState qdev;
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bool partially_hotplugged;
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@@ -361,6 +367,7 @@ struct PCIDevice {
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/* ID of standby device in net_failover pair */
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char *failover_pair_id;
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uint32_t acpi_index;
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+ PCIPASIDOps *pasid_ops;
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};
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void pci_register_bar(PCIDevice *pci_dev, int region_num,
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@@ -498,6 +505,10 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
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AddressSpace *pci_device_iommu_address_space(PCIDevice *dev);
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void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque);
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+void pci_setup_pasid_ops(PCIDevice *dev, PCIPASIDOps *ops);
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+bool pci_device_is_pasid_ops_set(PCIBus *bus, int32_t devfn);
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+int pci_device_set_pasid_table(PCIBus *bus, int32_t devfn, IOMMUConfig *config);
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+
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static inline void
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pci_set_byte(uint8_t *config, uint8_t val)
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{
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--
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2.27.0
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