152 lines
5.6 KiB
Diff
152 lines
5.6 KiB
Diff
From 96a6c8fa67298d52ccc27a0ac5bdddd6c42068cb Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>
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Date: Wed, 15 Dec 2021 19:24:21 +0100
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Subject: [PATCH 3/3] softmmu/physmem: Introduce MemTxAttrs::memory field and
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MEMTX_ACCESS_ERROR
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add the 'memory' bit to the memory attributes to restrict bus
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controller accesses to memories.
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Introduce flatview_access_allowed() to check bus permission
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before running any bus transaction.
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Have read/write accessors return MEMTX_ACCESS_ERROR if an access is
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restricted.
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There is no change for the default case where 'memory' is not set.
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Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Message-Id: <20211215182421.418374-4-philmd@redhat.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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[thuth: Replaced MEMTX_BUS_ERROR with MEMTX_ACCESS_ERROR, remove "inline"]
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Signed-off-by: Thomas Huth <thuth@redhat.com>
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---
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include/exec/memattrs.h | 9 +++++++++
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softmmu/physmem.c | 44 +++++++++++++++++++++++++++++++++++++++--
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2 files changed, 51 insertions(+), 2 deletions(-)
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diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
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index 95f2d20d55..9fb98bc1ef 100644
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--- a/include/exec/memattrs.h
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+++ b/include/exec/memattrs.h
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@@ -35,6 +35,14 @@ typedef struct MemTxAttrs {
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unsigned int secure:1;
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/* Memory access is usermode (unprivileged) */
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unsigned int user:1;
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+ /*
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+ * Bus interconnect and peripherals can access anything (memories,
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+ * devices) by default. By setting the 'memory' bit, bus transaction
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+ * are restricted to "normal" memories (per the AMBA documentation)
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+ * versus devices. Access to devices will be logged and rejected
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+ * (see MEMTX_ACCESS_ERROR).
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+ */
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+ unsigned int memory:1;
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/* Requester ID (for MSI for example) */
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unsigned int requester_id:16;
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/* Invert endianness for this page */
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@@ -66,6 +74,7 @@ typedef struct MemTxAttrs {
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#define MEMTX_OK 0
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#define MEMTX_ERROR (1U << 0) /* device returned an error */
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#define MEMTX_DECODE_ERROR (1U << 1) /* nothing at that address */
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+#define MEMTX_ACCESS_ERROR (1U << 2) /* access denied */
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typedef uint32_t MemTxResult;
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#endif
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diff --git a/softmmu/physmem.c b/softmmu/physmem.c
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index 049e7b1454..ae26f72909 100644
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--- a/softmmu/physmem.c
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+++ b/softmmu/physmem.c
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@@ -41,6 +41,7 @@
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "qemu/qemu-print.h"
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+#include "qemu/log.h"
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#include "exec/memory.h"
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#include "exec/ioport.h"
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#include "sysemu/dma.h"
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@@ -2767,6 +2768,33 @@ static bool prepare_mmio_access(MemoryRegion *mr)
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return release_lock;
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}
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+/**
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+ * flatview_access_allowed
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+ * @mr: #MemoryRegion to be accessed
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+ * @attrs: memory transaction attributes
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+ * @addr: address within that memory region
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+ * @len: the number of bytes to access
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+ *
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+ * Check if a memory transaction is allowed.
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+ *
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+ * Returns: true if transaction is allowed, false if denied.
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+ */
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+static bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs,
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+ hwaddr addr, hwaddr len)
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+{
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+ if (likely(!attrs.memory)) {
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+ return true;
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+ }
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+ if (memory_region_is_ram(mr)) {
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+ return true;
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+ }
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+ qemu_log_mask(LOG_GUEST_ERROR,
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+ "Invalid access to non-RAM device at "
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+ "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", "
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+ "region '%s'\n", addr, len, memory_region_name(mr));
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+ return false;
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+}
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+
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/* Called within RCU critical section. */
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static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
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MemTxAttrs attrs,
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@@ -2781,7 +2809,10 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
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const uint8_t *buf = ptr;
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for (;;) {
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- if (!memory_access_is_direct(mr, true)) {
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+ if (!flatview_access_allowed(mr, attrs, addr1, l)) {
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+ result |= MEMTX_ACCESS_ERROR;
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+ /* Keep going. */
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+ } else if (!memory_access_is_direct(mr, true)) {
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release_lock |= prepare_mmio_access(mr);
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l = memory_access_size(mr, l, addr1);
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/* XXX: could force current_cpu to NULL to avoid
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@@ -2826,6 +2857,9 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
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l = len;
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mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
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+ if (!flatview_access_allowed(mr, attrs, addr, len)) {
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+ return MEMTX_ACCESS_ERROR;
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+ }
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return flatview_write_continue(fv, addr, attrs, buf, len,
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addr1, l, mr);
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}
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@@ -2844,7 +2878,10 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
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fuzz_dma_read_cb(addr, len, mr);
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for (;;) {
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- if (!memory_access_is_direct(mr, false)) {
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+ if (!flatview_access_allowed(mr, attrs, addr1, l)) {
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+ result |= MEMTX_ACCESS_ERROR;
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+ /* Keep going. */
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+ } else if (!memory_access_is_direct(mr, false)) {
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/* I/O case */
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release_lock |= prepare_mmio_access(mr);
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l = memory_access_size(mr, l, addr1);
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@@ -2887,6 +2924,9 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
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l = len;
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mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
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+ if (!flatview_access_allowed(mr, attrs, addr, len)) {
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+ return MEMTX_ACCESS_ERROR;
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+ }
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return flatview_read_continue(fv, addr, attrs, buf, len,
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addr1, l, mr);
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}
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--
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2.27.0
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