a745a5b6f8
Problem: Broken bios creates inaccurate DMAR tables, reporting some bridges as having endpoint types. This causes IOMMU initialization to bail out early with an error code, the result of which is vfio not working correctly. This is seen on some Skylake based Wolfpass server platforms with up-to-date bios installed. Solution: Instead of just bailing out of IOMMU initialization when such a condition is found, we report it and continue. The IOMMU ends up successfully initialized anyway. We do this only on platforms that have the Skylake bridges where this issue has been seen. This change is inspired by a similar one posted by Lu Baolu of Intel Corp to lkml https://lkml.org/lkml/2019/12/24/15 Change-Id: Ief2df7099b6118eab7f99d5531616926a7a3eb27 Closes-Bug: 1847335 Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
80 lines
2.7 KiB
Diff
80 lines
2.7 KiB
Diff
From 3ea9b69ea4e791797b42d73b609b2e1f4fdb9882 Mon Sep 17 00:00:00 2001
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Message-Id: <3ea9b69ea4e791797b42d73b609b2e1f4fdb9882.1584647338.git.Jim.Somerville@windriver.com>
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From: Jim Somerville <Jim.Somerville@windriver.com>
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Date: Wed, 29 Jan 2020 14:19:22 -0500
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Subject: [PATCH 1/1] Allow dmar quirks for broken bioses
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Problem:
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Broken bios creates inaccurate DMAR tables,
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reporting some bridges as having endpoint types.
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This causes IOMMU initialization to bail
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out early with an error code, the result of
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which is vfio not working correctly.
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This is seen on some Skylake based Wolfpass
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server platforms with up-to-date bios installed.
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Solution:
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Instead of just bailing out of IOMMU
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initialization when such a condition is found,
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we report it and continue. The IOMMU ends
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up successfully initialized anyway. We do this
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only on platforms that have the Skylake bridges
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where this issue has been seen.
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This change is inspired by a similar one posted by
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Lu Baolu of Intel Corp to lkml
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https://lkml.org/lkml/2019/12/24/15
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Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
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---
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drivers/iommu/dmar.c | 25 ++++++++++++++++++++++++-
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1 file changed, 24 insertions(+), 1 deletion(-)
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diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
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index 4658dc3..eeaef2e 100644
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--- a/drivers/iommu/dmar.c
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+++ b/drivers/iommu/dmar.c
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@@ -75,6 +75,26 @@ static unsigned long dmar_seq_ids[BITS_TO_LONGS(DMAR_UNITS_SUPPORTED)];
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static int alloc_iommu(struct dmar_drhd_unit *drhd);
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static void free_iommu(struct intel_iommu *iommu);
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+static int scope_mismatch_quirk;
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+static void quirk_dmar_scope_mismatch(struct pci_dev *dev)
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+{
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+ pci_info(dev, "scope mismatch ignored\n");
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+ scope_mismatch_quirk = 1;
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+}
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+
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+/*
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+ * We expect devices with endpoint scope to have normal PCI
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+ * headers, and devices with bridge scope to have bridge PCI
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+ * headers. However some PCI devices may be listed in the
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+ * DMAR table with bridge scope, even though they have a
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+ * normal PCI header and vice versa. We don't declare a
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+ * scope mismatch for the special cases below, even though
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+ * the bios creates broken tables.
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+ */
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+/* Sky Lake-E PCI Express Root Port A */
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2030,
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+ quirk_dmar_scope_mismatch);
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+
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static void dmar_register_drhd_unit(struct dmar_drhd_unit *drhd)
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{
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/*
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@@ -257,7 +277,10 @@ int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
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info->dev->class >> 8 != PCI_CLASS_BRIDGE_OTHER))) {
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pr_warn("Device scope type does not match for %s\n",
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pci_name(info->dev));
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- return -EINVAL;
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+ if (!scope_mismatch_quirk)
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+ return -EINVAL;
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+ else
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+ pr_warn("but continuing anyway\n");
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}
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for_each_dev_scope(devices, devices_cnt, i, tmp)
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--
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1.8.3.1
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