
Intel listed total 28 commits that need us to back port. There are 9 commits that are already included in our code base. The commit "ice: Add support for E825-C TS PLL handling" will not be back ported since we're not dealing with E825 for 24.09. So we need back port 18 commits. These commits were introduced in linux-6.9.y and linux-6.10.y. To back port these 18 commits successfully, we totally back ported 37 upstream commits. 1) The patches 1-15 are cherry picked to fix the conflicts for patch 16 ("ice: introduce PTP state machine") and patch 36 "ice: Introduce ice_ptp_hw struct". Also will be helpful for the subsequent commits back porting. 2) The patches 24-27 are cherry picked to fix the conflicts for patch 28 ("ice: Fix debugfs with devlink reload") 3) The minor adjust was done for the patches 17, 21, 23 and 33 to fit with the context change. Verification: - installs from iso succeed on servers with ice(Intel Ethernet Controller E810-XXVDA4T Westport Channel) and i40e hw(Intel Ethernet Controller X710) for rt and std. - interfaces are up and pass packets for rt and std. - create vfs, ensure that they are picked up by the new iavf driver and that the interface can come up and pass packets on rt and std system. - Check dmesg to see DDP package is loaded successfully and the version is 1.3.36.0 for rt and std. Story: 2011056 Task: 50950 Change-Id: I9aef0378ea01451684341093a167eaead3edc458 Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
81 lines
2.9 KiB
Diff
81 lines
2.9 KiB
Diff
From cd12b5c8239993e395436ff9a01b524103aa0641 Mon Sep 17 00:00:00 2001
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From: Jacob Keller <jacob.e.keller@intel.com>
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Date: Tue, 28 May 2024 16:03:56 -0700
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Subject: [PATCH] ice: Introduce ice_get_base_incval() helper
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Add a new helper for getting base clock increment value for specific HW.
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Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
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Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
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Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
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Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com>
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Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
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Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-6-c082739bb6f6@intel.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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(cherry picked from commit 1f374d57c39386520586539641cafc999d0f3ef5)
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Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
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---
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drivers/net/ethernet/intel/ice/ice_ptp.c | 9 +--------
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drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 18 ++++++++++++++++++
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2 files changed, 19 insertions(+), 8 deletions(-)
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diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
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index bb1572a353d0..44b8fc8021cd 100644
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--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
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+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
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@@ -7,8 +7,6 @@
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#define E810_OUT_PROP_DELAY_NS 1
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-#define UNKNOWN_INCVAL_E82X 0x100000000ULL
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-
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static const struct ptp_pin_desc ice_pin_desc_e810t[] = {
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/* name idx func chan */
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{ "GNSS", GNSS, PTP_PF_EXTTS, 0, { 0, } },
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@@ -1229,12 +1227,7 @@ static u64 ice_base_incval(struct ice_pf *pf)
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struct ice_hw *hw = &pf->hw;
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u64 incval;
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- if (ice_is_e810(hw))
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- incval = ICE_PTP_NOMINAL_INCVAL_E810;
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- else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ)
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- incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw));
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- else
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- incval = UNKNOWN_INCVAL_E82X;
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+ incval = ice_get_base_incval(hw);
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dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n",
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incval);
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diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
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index d788221eba57..749a3f2d8293 100644
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--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
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+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
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@@ -283,6 +283,24 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num);
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int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id,
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unsigned long *caps);
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+/**
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+ * ice_get_base_incval - Get base clock increment value
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+ * @hw: pointer to the HW struct
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+ *
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+ * Return: base clock increment value for supported PHYs, 0 otherwise
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+ */
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+static inline u64 ice_get_base_incval(struct ice_hw *hw)
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+{
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+ switch (hw->ptp.phy_model) {
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+ case ICE_PHY_E810:
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+ return ICE_PTP_NOMINAL_INCVAL_E810;
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+ case ICE_PHY_E82X:
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+ return ice_e82x_nominal_incval(ice_e82x_time_ref(hw));
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+ default:
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+ return 0;
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+ }
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+}
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+
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#define PFTSYN_SEM_BYTES 4
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#define ICE_PTP_CLOCK_INDEX_0 0x00
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--
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2.43.0
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