92efe6f666
Add kernel 5.10.74 debian packaging. The kernel we are building starts as source code from the Yocto Project kernel found at (https://git.yoctoproject.org/cgit/cgit.cgi/linux-yocto/about/?h=v5.10/standard/base). To facilitate the creation of a Debian package of this kernel we start by making a copy of the 5.10 Debian Bullseye 'debian' folder taken from (http://snapshot.debian.org/package/linux/5.10.28-1/) and apply customization via the meta-data patches in debian/deb_patches dir. In this way we can review and incorporate changes the Debian community makes to their kernel's 'debian' folder over time. Since there are StarlingX specific patches to the kernel not suitable to send for merging in linux-yocto we apply these here as defined in scope and order in the contained debian/patches/series file. Verification: As we are only getting the Debian work bootstrapped there is quite a few restrictions as far as what can be tested. - I have compared it to the kernel 5.10.74 being used with stx centos: - the linux-yocto source code is same; - all the StarlingX specific patches are same; - the .config of Starlingx centos kernel 5.10.74 is taken to Starlingx debian, coexists and overrides the default debian kenrel configs, and only below changes are done for it: - remove some CONFIGs not set by Starlingx centos kernel code intentionally, such as CONFIG_CC_CAN_LINK; - remove some CONFIGs special for Starlingx centos kernel code such as: CONFIG_CC_VERSION_TEXT; - keep the CONFIGs related with signature aligned with debian release, because the security feature is still in development. - 28 debs are built successfully. Build kernel image into rootfs and initramfs. Build the LAT ustart image from them. - Use qemu to boot the ustart image, and the installer installs the rootfs successfully. The final debian system with this new kernel boot up successfully and run some simple commands successfully. Story: 2009221 Task: 43290 Signed-off-by: Li Zhou <li.zhou@windriver.com> Change-Id: I2f98fcc3f929e3e006d30210d559913a10a77ac2
80 lines
2.6 KiB
Diff
80 lines
2.6 KiB
Diff
From 4d58a9a618827e4410e3828b4deef5832a8576db Mon Sep 17 00:00:00 2001
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From: Jim Somerville <Jim.Somerville@windriver.com>
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Date: Wed, 29 Jan 2020 14:19:22 -0500
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Subject: [PATCH 07/10] Allow dmar quirks for broken bioses
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Problem:
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Broken bios creates inaccurate DMAR tables,
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reporting some bridges as having endpoint types.
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This causes IOMMU initialization to bail
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out early with an error code, the result of
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which is vfio not working correctly.
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This is seen on some Skylake based Wolfpass
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server platforms with up-to-date bios installed.
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Solution:
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Instead of just bailing out of IOMMU
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initialization when such a condition is found,
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we report it and continue. The IOMMU ends
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up successfully initialized anyway. We do this
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only on platforms that have the Skylake bridges
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where this issue has been seen.
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This change is inspired by a similar one posted by
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Lu Baolu of Intel Corp to lkml
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https://lkml.org/lkml/2019/12/24/15
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Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
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Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
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---
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drivers/iommu/intel/dmar.c | 25 ++++++++++++++++++++++++-
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1 file changed, 24 insertions(+), 1 deletion(-)
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diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
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index 02e7c10a4224..7d423ac36a44 100644
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--- a/drivers/iommu/intel/dmar.c
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+++ b/drivers/iommu/intel/dmar.c
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@@ -66,6 +66,26 @@ static void free_iommu(struct intel_iommu *iommu);
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extern const struct iommu_ops intel_iommu_ops;
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+static int scope_mismatch_quirk;
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+static void quirk_dmar_scope_mismatch(struct pci_dev *dev)
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+{
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+ pci_info(dev, "scope mismatch ignored\n");
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+ scope_mismatch_quirk = 1;
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+}
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+
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+/*
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+ * We expect devices with endpoint scope to have normal PCI
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+ * headers, and devices with bridge scope to have bridge PCI
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+ * headers. However some PCI devices may be listed in the
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+ * DMAR table with bridge scope, even though they have a
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+ * normal PCI header and vice versa. We don't declare a
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+ * scope mismatch for the special cases below, even though
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+ * the bios creates broken tables.
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+ */
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+/* Sky Lake-E PCI Express Root Port A */
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2030,
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+ quirk_dmar_scope_mismatch);
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+
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static void dmar_register_drhd_unit(struct dmar_drhd_unit *drhd)
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{
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/*
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@@ -255,7 +275,10 @@ int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
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info->dev->class >> 16 != PCI_BASE_CLASS_BRIDGE))) {
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pr_warn("Device scope type does not match for %s\n",
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pci_name(info->dev));
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- return -EINVAL;
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+ if (!scope_mismatch_quirk)
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+ return -EINVAL;
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+ else
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+ pr_warn("but continuing anyway\n");
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}
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for_each_dev_scope(devices, devices_cnt, i, tmp)
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--
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2.29.2
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